1 /* $NetBSD: ixp12x0_clk.c,v 1.12 2008/01/20 16:28:23 joerg Exp $ */
4 * Copyright (c) 1997 Mark Brinicombe.
5 * Copyright (c) 1997 Causality Limited.
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_clk.c,v 1.12 2008/01/20 16:28:23 joerg Exp $");
43 #include <sys/types.h>
44 #include <sys/param.h>
45 #include <sys/atomic.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
49 #include <sys/timetc.h>
50 #include <sys/device.h>
52 #include <machine/bus.h>
53 #include <machine/intr.h>
55 #include <arm/cpufunc.h>
57 #include <arm/ixp12x0/ixpsipvar.h>
59 #include <arm/ixp12x0/ixp12x0_pcireg.h>
60 #include <arm/ixp12x0/ixp12x0_clkreg.h>
61 #include <arm/ixp12x0/ixp12x0var.h>
63 static int ixpclk_match(struct device
*, struct cfdata
*, void *);
64 static void ixpclk_attach(struct device
*, struct device
*, void *);
66 static u_int
ixpclk_get_timecount(struct timecounter
*);
71 /* callback functions for intr_functions */
72 static int ixpclk_intr(void* arg
);
76 bus_addr_t sc_baseaddr
;
77 bus_space_tag_t sc_iot
;
78 bus_space_handle_t sc_ioh
;
79 bus_space_handle_t sc_pll_ioh
;
81 u_int32_t sc_clock_count
;
82 u_int32_t sc_count_per_usec
;
83 u_int32_t sc_coreclock_freq
;
86 #define XTAL_FREQ 3686400 /* 3.6864MHz */
87 #define XTAL_FREQ3686400
88 #undef XTAL_FREQ3787800
89 #undef XTAL_FREQ3579500
92 #if defined(XTAL_FREQ3686400)
93 static u_int32_t ccf_to_coreclock
[MAX_CCF
+ 1] = {
118 #elif defined(XTAL_FREQ3787800)
119 #elif defined(XTAL_FREQ3579500)
124 static struct ixpclk_softc
*ixpclk_sc
= NULL
;
126 static struct timecounter ixpclk_timecounter
= {
127 ixpclk_get_timecount
, /* get_timecount */
129 0xffffffff, /* counter_mask */
137 static volatile uint32_t ixpclk_base
;
139 #define TIMER_FREQUENCY 3686400 /* 3.6864MHz */
140 #define TICKS_PER_MICROSECOND (TIMER_FREQUENCY/1000000)
142 CFATTACH_DECL(ixpclk
, sizeof(struct ixpclk_softc
),
143 ixpclk_match
, ixpclk_attach
, NULL
, NULL
);
145 #define GET_TIMER_VALUE(sc) (bus_space_read_4((sc)->sc_iot, \
151 ixpclk_match(struct device
*parent
, struct cfdata
*match
, void *aux
)
158 ixpclk_attach(struct device
*parent
, struct device
*self
, void *aux
)
160 struct ixpclk_softc
*sc
;
161 struct ixpsip_attach_args
*sa
;
163 bool first_run
= ixpclk_sc
== NULL
;
167 sc
= (struct ixpclk_softc
*) self
;
169 sc
->sc_iot
= sa
->sa_iot
;
170 sc
->sc_baseaddr
= sa
->sa_addr
;
172 /* using first timer for system ticks */
173 if (ixpclk_sc
== NULL
)
176 if (bus_space_map(sa
->sa_iot
, sa
->sa_addr
, sa
->sa_size
, 0,
178 panic("%s: Cannot map registers", self
->dv_xname
);
179 if (bus_space_map(sa
->sa_iot
, sa
->sa_addr
+ IXPCLK_PLL_CFG_OFFSET
,
180 IXPCLK_PLL_CFG_SIZE
, 0, &sc
->sc_pll_ioh
))
181 panic("%s: Cannot map registers", self
->dv_xname
);
183 /* disable all channel and clear interrupt status */
184 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CONTROL
,
185 IXPCL_DISABLE
| IXPCL_PERIODIC
| IXPCL_STP_CORE
);
186 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CLEAR
, 0);
189 ccf
= bus_space_read_4(sc
->sc_iot
, sc
->sc_pll_ioh
, 0)
190 & IXP12X0_PLL_CFG_CCF
;
191 sc
->sc_coreclock_freq
= ccf_to_coreclock
[ccf
];
193 sc
->sc_clock_count
= sc
->sc_coreclock_freq
/ hz
;
194 sc
->sc_count_per_usec
= sc
->sc_coreclock_freq
/ 1000000;
196 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CLEAR
, IXPT_CLEAR
);
197 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_LOAD
,
199 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CONTROL
,
200 IXPCL_ENABLE
| IXPCL_PERIODIC
| IXPCL_STP_CORE
);
203 ixpclk_timecounter
.tc_frequency
= sc
->sc_coreclock_freq
;
204 tc_init(&ixpclk_timecounter
);
207 printf("%s: IXP12x0 Interval Timer (core clock %d.%03dMHz)\n",
209 sc
->sc_coreclock_freq
/ 1000000,
210 (sc
->sc_coreclock_freq
% 1000000) / 1000);
216 * Handle the hardclock interrupt.
219 ixpclk_intr(void *arg
)
222 bus_space_write_4(ixpclk_sc
->sc_iot
, ixpclk_sc
->sc_ioh
,
225 atomic_add_32(&ixpclk_base
, ixpclk_sc
->sc_coreclock_freq
);
227 hardclock((struct clockframe
*) arg
);
234 * Set the rate of the statistics clock.
236 * We assume that hz is either stathz or profhz, and that neither
237 * will change after being set by cpu_initclocks(). We could
238 * recalculate the intervals here, but that would be a pain.
241 setstatclockrate(int newhz
)
246 /* XXX should I use TIMER2? */
252 * Initialize the clock and get them going.
257 struct ixpclk_softc
* sc
;
262 printf("clock: hz = %d stathz = %d\n", hz
, stathz
);
264 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CONTROL
,
266 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CLEAR
, IXPT_CLEAR
);
268 ixp12x0_intr_establish(IXPPCI_INTR_T1
, IPL_CLOCK
, ixpclk_intr
, NULL
);
270 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_LOAD
,
272 bus_space_write_4(sc
->sc_iot
, sc
->sc_ioh
, IXPCLK_CONTROL
,
273 IXPCL_ENABLE
| IXPCL_PERIODIC
283 savedints
= disable_interrupts(I32_bit
);
284 counter
= GET_TIMER_VALUE(ixpclk_sc
);
285 restore_interrupts(savedints
);
290 ixpclk_get_timecount(struct timecounter
*tc
)
292 u_int savedints
, base
, counter
;
294 savedints
= disable_interrupts(I32_bit
);
297 counter
= GET_TIMER_VALUE(ixpclk_sc
);
298 } while (base
!= ixpclk_base
);
299 restore_interrupts(savedints
);
301 return base
- counter
;
307 * Delay for at least N microseconds.
310 delay(unsigned int usecs
)
320 if (ixpclk_sc
== NULL
) {
322 printf("delay: called befor start ixpclk\n");
325 csec
= usecs
/ 10000;
326 usec
= usecs
% 10000;
328 usecs
= (TIMER_FREQUENCY
/ 100) * csec
329 + (TIMER_FREQUENCY
/ 100) * usec
/ 10000;
330 /* clock isn't initialized yet */
331 for(; usecs
> 0; usecs
--)
332 for(j
= 100; j
> 0; j
--)
337 count
= ixpclk_sc
->sc_count_per_usec
* usecs
;
342 for(j
= 100; j
> 0; j
--)
346 delta
= otick
< ticks
347 ? ixpclk_sc
->sc_clock_count
+ otick
- ticks