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[netbsd-mini2440.git] / sys / arch / arm / ixp12x0 / ixp12x0_pci.c
blob65b4892c89a52fddefd5d9342998942e1ca0ea5b
1 /* $NetBSD: ixp12x0_pci.c,v 1.9 2009/03/14 15:36:02 dsl Exp $ */
2 /*
3 * Copyright (c) 2002, 2003 The NetBSD Foundation, Inc.
4 * All rights reserved.
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA and Naoto Shimazaki.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci.c,v 1.9 2009/03/14 15:36:02 dsl Exp $");
35 * PCI configuration support for IXP12x0 Network Processor chip.
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 #include <sys/extent.h>
42 #include <sys/malloc.h>
44 #include <uvm/uvm_extern.h>
46 #include <arm/ixp12x0/ixp12x0reg.h>
47 #include <arm/ixp12x0/ixp12x0var.h>
49 #include <dev/pci/pcireg.h>
50 #include <dev/pci/pcivar.h>
51 #include <dev/pci/pciconf.h>
53 #include "opt_pci.h"
54 #include "pci.h"
56 void ixp12x0_pci_attach_hook(struct device *, struct device *,
57 struct pcibus_attach_args *);
58 int ixp12x0_pci_bus_maxdevs(void *, int);
59 pcitag_t ixp12x0_pci_make_tag(void *, int, int, int);
60 void ixp12x0_pci_decompose_tag(void *, pcitag_t, int *, int *, int *);
61 pcireg_t ixp12x0_pci_conf_read(void *, pcitag_t, int);
62 void ixp12x0_pci_conf_write(void *, pcitag_t, int, pcireg_t);
64 static vaddr_t ixp12x0_pci_conf_setup(void *, struct ixp12x0_softc *, pcitag_t, int);
66 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit)
67 #define PCI_CONF_UNLOCK(s) restore_interrupts((s))
69 #define MAX_PCI_DEVICES 4
72 * IXM1200 PCI configuration Cycles
73 * Device Address
74 * -------------------------------------
75 * 0 IXP1200 0x0800 - 0x08FF
76 * 1 i21555 0x1000 - 0x10FF
77 * 2 i82559 0x2000 - 0x20FF
78 * 3 PMC expansion 0x4000 - 0x40FF
81 void
82 ixp12x0_pci_init(pci_chipset_tag_t pc, void *cookie)
84 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
85 struct ixp12x0_softc *sc = cookie;
86 struct extent *ioext, *memext;
87 #endif
88 pc->pc_conf_v = cookie;
89 pc->pc_attach_hook = ixp12x0_pci_attach_hook;
90 pc->pc_bus_maxdevs = ixp12x0_pci_bus_maxdevs;
91 pc->pc_make_tag = ixp12x0_pci_make_tag;
92 pc->pc_decompose_tag = ixp12x0_pci_decompose_tag;
93 pc->pc_conf_read = ixp12x0_pci_conf_read;
94 pc->pc_conf_write = ixp12x0_pci_conf_write;
96 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE)
97 ioext = extent_create("pciio", 0, IXP12X0_PCI_IO_SIZE - 1,
98 M_DEVBUF, NULL, 0, EX_NOWAIT);
99 /* PCI MEM space is mapped same address as real memory */
100 memext = extent_create("pcimem", IXP12X0_PCI_MEM_HWBASE,
101 IXP12X0_PCI_MEM_HWBASE +
102 IXP12X0_PCI_MEM_SIZE - 1,
103 M_DEVBUF, NULL, 0, EX_NOWAIT);
104 printf("%s: configuring PCI bus\n", sc->sc_dev.dv_xname);
105 pci_configure_bus(pc, ioext, memext, NULL, 0 /* XXX bus = 0 */,
106 arm_dcache_align);
108 extent_destroy(ioext);
109 extent_destroy(memext);
110 #endif
113 void
114 pci_conf_interrupt(pci_chipset_tag_t pc, int a, int b, int c, int d, int *p)
116 /* Nothing */
119 void
120 ixp12x0_pci_attach_hook(struct device *parent, struct device *self, struct pcibus_attach_args *pba)
122 /* Nothing to do. */
126 ixp12x0_pci_bus_maxdevs(void *v, int busno)
128 return(MAX_PCI_DEVICES);
131 pcitag_t
132 ixp12x0_pci_make_tag(void *v, int bus, int device, int function)
134 #ifdef PCI_DEBUG
135 printf("ixp12x0_pci_make_tag(v=%p, bus=%d, device=%d, function=%d)\n",
136 v, bus, device, function);
137 #endif
138 return ((bus << 16) | (device << 11) | (function << 8));
141 void
142 ixp12x0_pci_decompose_tag(void *v, pcitag_t tag, int *busp, int *devicep, int *functionp)
144 #ifdef PCI_DEBUG
145 printf("ixp12x0_pci_decompose_tag(v=%p, tag=0x%08lx, bp=%x, dp=%x, fp=%x)\n",
146 v, tag, (int)busp, (int)devicep, (int)functionp);
147 #endif
149 if (busp != NULL)
150 *busp = (tag >> 16) & 0xff;
151 if (devicep != NULL)
152 *devicep = (tag >> 11) & 0x1f;
153 if (functionp != NULL)
154 *functionp = (tag >> 8) & 0x7;
157 static vaddr_t
158 ixp12x0_pci_conf_setup(void *v, struct ixp12x0_softc *sc, pcitag_t tag, int offset)
160 int bus, device, function;
161 vaddr_t addr;
163 ixp12x0_pci_decompose_tag(v, tag, &bus, &device, &function);
165 if (bus == 0) {
166 /* configuration type 0 */
167 addr = (vaddr_t) bus_space_vaddr(sc->sc_iot, sc->sc_conf0_ioh) +
168 ((1 << (device + 10)) | (offset & ~3));
169 } else {
170 /* configuration type 1 */
171 addr = (vaddr_t) bus_space_vaddr(sc->sc_iot, sc->sc_conf1_ioh) +
172 ((bus << 16) | (device << 11) |
173 (function << 8) | (offset & ~3) | 1);
175 return addr;
178 pcireg_t
179 ixp12x0_pci_conf_read(void *v, pcitag_t tag, int offset)
181 struct ixp12x0_softc *sc = v;
182 vaddr_t va = ixp12x0_pci_conf_setup(v, sc, tag, offset);
183 pcireg_t rv;
184 int s;
186 #ifdef PCI_DEBUG
187 printf("ixp12x0_pci_conf_read: base=%lx,va=%lx,tag=%lx,offset=%x\n",
188 sc->sc_conf0_ioh, va, tag, offset);
189 #endif
190 if (va == 0)
191 return -1;
193 PCI_CONF_LOCK(s);
195 if (badaddr_read((void *) va, sizeof(rv), &rv)) {
196 #ifdef PCI_DEBUG
197 printf("conf_read: %lx bad address\n", va);
198 #endif
199 rv = (pcireg_t) - 1;
202 PCI_CONF_UNLOCK(s);
204 return rv;
207 void
208 ixp12x0_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val)
210 struct ixp12x0_softc *sc = v;
211 vaddr_t va = ixp12x0_pci_conf_setup(v, sc, tag, offset);
212 int s;
214 #ifdef PCI_DEBUG
215 printf("ixp12x0_pci_conf_write: tag=%lx offset=%x -> va=%lx (base=%lx)\n",
216 tag, offset, va, sc->sc_conf0_ioh);
217 #endif
219 PCI_CONF_LOCK(s);
221 *(pcireg_t *) va = val;
223 PCI_CONF_UNLOCK(s);