1 /* $NetBSD: ixp12x0_pci_dma.c,v 1.6 2003/03/25 06:12:47 igy Exp $ */
3 * Copyright (c) 2002, 2003
4 * Ichiro FUKUHARA <ichiro@ichiro.org>.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci_dma.c,v 1.6 2003/03/25 06:12:47 igy Exp $");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 #include <sys/malloc.h>
38 #include <uvm/uvm_extern.h>
40 #define _ARM32_BUS_DMA_PRIVATE
41 #include <machine/bus.h>
43 #include <arm/ixp12x0/ixp12x0_pcireg.h>
44 #include <arm/ixp12x0/ixp12x0var.h>
47 ixp12x0_pci_dma_init(struct ixp12x0_softc
*sc
)
49 extern paddr_t physical_start
, physical_end
;
51 bus_dma_tag_t dmat
= &sc
->ia_pci_dmat
;
52 struct arm32_dma_range
*dr
= &sc
->ia_pci_dma_range
;
57 dr
->dr_sysbase
= physical_start
;
58 dr
->dr_busbase
= PCI_MAPREG_MEM_ADDR(IXP1200_PCI_MEM_BAR
+
60 dr
->dr_len
= physical_end
- physical_start
;
62 dmat
->_dmamap_create
= _bus_dmamap_create
;
63 dmat
->_dmamap_destroy
= _bus_dmamap_destroy
;
64 dmat
->_dmamap_load
= _bus_dmamap_load
;
65 dmat
->_dmamap_load_mbuf
= _bus_dmamap_load_mbuf
;
66 dmat
->_dmamap_load_uio
= _bus_dmamap_load_uio
;
67 dmat
->_dmamap_load_raw
= _bus_dmamap_load_raw
;
68 dmat
->_dmamap_unload
= _bus_dmamap_unload
;
69 dmat
->_dmamap_sync_pre
= _bus_dmamap_sync
;
70 dmat
->_dmamap_sync_post
= NULL
;
72 dmat
->_dmamem_alloc
= _bus_dmamem_alloc
;
73 dmat
->_dmamem_free
= _bus_dmamem_free
;
74 dmat
->_dmamem_map
= _bus_dmamem_map
;
75 dmat
->_dmamem_unmap
= _bus_dmamem_unmap
;
76 dmat
->_dmamem_mmap
= _bus_dmamem_mmap
;