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[netbsd-mini2440.git] / sys / arch / arm / omap / omap2_gpmcreg.h
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1 /* $NetBSD: omap2_gpmcreg.h,v 1.1 2008/08/27 11:03:10 matt Exp $ */
2 /*
3 * Copyright (c) 2007 Microsoft
4 * All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Microsoft
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
31 #ifndef _OMAP2430GPMCREG_H
32 #define _OMAP2430GPMCREG_H
35 * Header for OMAP2 General Purpose Memory Controller
39 * GPMC register base address, offsets, and size
41 #ifdef OMAP_2430
42 #define GPMC_BASE 0x6e000000
43 #endif
44 #ifdef OMAP_2420
45 #define GPMC_BASE 0x6800a000
46 #endif
47 #ifdef OMAP_3530
48 #define GPMC_BASE 0x6e000000
49 #endif
51 #define GPMC_REVISION 0x000
52 #define GPMC_SYSCONFIG 0x010
53 #define GPMC_SYSSTATUS 0x014
54 #define GPMC_IRQSTATUS 0x018
55 #define GPMC_IRQENABLE 0x01C
56 #define GPMC_TIMEOUT_CONTROL 0x040
57 #define GPMC_ERR_ADDRESS 0x044
58 #define GPMC_ERR_TYPE 0x048
59 #define GPMC_CONFIG 0x050
60 #define GPMC_STATUS 0x054
61 #define GPMC_CONFIG1_0 0x060
62 #define GPMC_CONFIG2_0 0x064
63 #define GPMC_CONFIG3_0 0x068
64 #define GPMC_CONFIG4_0 0x06C
65 #define GPMC_CONFIG5_0 0x070
66 #define GPMC_CONFIG6_0 0x074
67 #define GPMC_CONFIG7_0 0x078
68 #define GPMC_NAND_COMMAND_0 0x07C
69 #define GPMC_NAND_ADDRESS_0 0x080
70 #define GPMC_NAND_DATA_0 0x084
71 #define GPMC_CONFIG1_1 0x090
72 #define GPMC_CONFIG2_1 0x094
73 #define GPMC_CONFIG3_1 0x098
74 #define GPMC_CONFIG4_1 0x09C
75 #define GPMC_CONFIG5_1 0x0A0
76 #define GPMC_CONFIG6_1 0x0A4
77 #define GPMC_CONFIG7_1 0x0A8
78 #define GPMC_NAND_COMMAND_1 0x0AC
79 #define GPMC_NAND_ADDRESS_1 0x0B0
80 #define GPMC_NAND_DATA_1 0x0B4
81 #define GPMC_CONFIG1_2 0x0C0
82 #define GPMC_CONFIG2_2 0x0C4
83 #define GPMC_CONFIG3_2 0x0C8
84 #define GPMC_CONFIG4_2 0x0CC
85 #define GPMC_CONFIG5_2 0x0D0
86 #define GPMC_CONFIG6_2 0x0D4
87 #define GPMC_CONFIG7_2 0x0D8
88 #define GPMC_NAND_COMMAND_2 0x0DC
89 #define GPMC_NAND_ADDRESS_2 0x0E0
90 #define GPMC_NAND_DATA_2 0x0E4
91 #define GPMC_CONFIG1_3 0x0F0
92 #define GPMC_CONFIG2_3 0x0F4
93 #define GPMC_CONFIG3_3 0x0F8
94 #define GPMC_CONFIG4_3 0x0FC
95 #define GPMC_CONFIG5_3 0x100
96 #define GPMC_CONFIG6_3 0x104
97 #define GPMC_CONFIG7_3 0x108
98 #define GPMC_NAND_COMMAND_3 0x10C
99 #define GPMC_NAND_ADDRESS_3 0x110
100 #define GPMC_NAND_DATA_3 0x114
101 #define GPMC_CONFIG1_4 0x120
102 #define GPMC_CONFIG2_4 0x124
103 #define GPMC_CONFIG3_4 0x128
104 #define GPMC_CONFIG4_4 0x12C
105 #define GPMC_CONFIG5_4 0x130
106 #define GPMC_CONFIG6_4 0x134
107 #define GPMC_CONFIG7_4 0x138
108 #define GPMC_NAND_COMMAND_4 0x13C
109 #define GPMC_NAND_ADDRESS_4 0x140
110 #define GPMC_NAND_DATA_4 0x144
111 #define GPMC_CONFIG1_5 0x150
112 #define GPMC_CONFIG2_5 0x154
113 #define GPMC_CONFIG3_5 0x158
114 #define GPMC_CONFIG4_5 0x15C
115 #define GPMC_CONFIG5_5 0x160
116 #define GPMC_CONFIG6_5 0x164
117 #define GPMC_CONFIG7_5 0x168
118 #define GPMC_NAND_COMMAND_5 0x16C
119 #define GPMC_NAND_ADDRESS_5 0x170
120 #define GPMC_NAND_DATA_5 0x174
121 #define GPMC_CONFIG1_6 0x180
122 #define GPMC_CONFIG2_6 0x184
123 #define GPMC_CONFIG3_6 0x188
124 #define GPMC_CONFIG4_6 0x18C
125 #define GPMC_CONFIG5_6 0x190
126 #define GPMC_CONFIG6_6 0x194
127 #define GPMC_CONFIG7_6 0x198
128 #define GPMC_NAND_COMMAND_6 0x19C
129 #define GPMC_NAND_ADDRESS_6 0x1A0
130 #define GPMC_NAND_DATA_6 0x1A4
131 #define GPMC_CONFIG1_7 0x1B0
132 #define GPMC_CONFIG2_7 0x1B4
133 #define GPMC_CONFIG3_7 0x1B8
134 #define GPMC_CONFIG4_7 0x1BC
135 #define GPMC_CONFIG5_7 0x1C0
136 #define GPMC_CONFIG6_7 0x1C4
137 #define GPMC_CONFIG7_7 0x1C8
138 #define GPMC_NAND_COMMAND_7 0x1CC
139 #define GPMC_NAND_ADDRESS_7 0x1D0
140 #define GPMC_NAND_DATA_7 0x1D4
141 #define GPMC_PREFETCH_CONFIG1 0x1E0
142 #define GPMC_PREFETCH_CONFIG2 0x1E4
143 #define GPMC_PREFETCH_CONTROL 0x1EC
144 #define GPMC_CONFIG1_6 0x180
145 #define GPMC_CONFIG2_6 0x184
146 #define GPMC_CONFIG3_6 0x188
147 #define GPMC_CONFIG4_6 0x18C
148 #define GPMC_CONFIG5_6 0x190
149 #define GPMC_CONFIG6_6 0x194
150 #define GPMC_CONFIG7_6 0x198
151 #define GPMC_NAND_COMMAND_6 0x19C
152 #define GPMC_NAND_ADDRESS_6 0x1A0
153 #define GPMC_NAND_DATA_6 0x1A4
154 #define GPMC_CONFIG1_7 0x1B0
155 #define GPMC_CONFIG2_7 0x1B4
156 #define GPMC_CONFIG3_7 0x1B8
157 #define GPMC_CONFIG4_7 0x1BC
158 #define GPMC_CONFIG5_7 0x1C0
159 #define GPMC_CONFIG6_7 0x1C4
160 #define GPMC_CONFIG7_7 0x1C8
161 #define GPMC_NAND_COMMAND_7 0x1CC
162 #define GPMC_NAND_ADDRESS_7 0x1D0
163 #define GPMC_NAND_DATA_7 0x1D4
164 #define GPMC_PREFETCH_CONFIG1 0x1E0
165 #define GPMC_PREFETCH_CONFIG2 0x1E4
166 #define GPMC_PREFETCH_CONTROL 0x1EC
167 #define GPMC_PREFETCH_STATUS 0x1F0
168 #define GPMC_ECC_CONFIG 0x1F4
169 #define GPMC_ECC_CONTROL 0x1F8
170 #define GPMC_ECC_SIZE_CONFIG 0x1FC
171 #define GPMC_ECC1_RESULT 0x200
172 #define GPMC_ECC2_RESULT 0x204
173 #define GPMC_ECC3_RESULT 0x208
174 #define GPMC_ECC4_RESULT 0x20C
175 #define GPMC_ECC5_RESULT 0x210
176 #define GPMC_ECC6_RESULT 0x214
177 #define GPMC_ECC7_RESULT 0x218
178 #define GPMC_ECC8_RESULT 0x21C
179 #define GPMC_ECC9_RESULT 0x220
180 #define GPMC_TESTMODE_CTRL 0x230
181 #define GPMC_PSA_LSB 0x234
182 #define GPMC_PSA_MSB 0x238
184 #define GPMC_SIZE (GPMC_PSA_MSB + 4)
185 #define GPMC_NCS 8 /* # Chip Selects */
188 * GPMC OMAP2430_GPMC_REVISION
190 #define GPMC_REVISION_REV __BITS(7,0)
191 #define GPMC_REVISION_REV_MAJ(r) (((r) >> 4) & 0xf)
192 #define GPMC_REVISION_REV_MIN(r) (((r) >> 0) & 0xf)
195 * GPMC CONFIG7_[0-7] bits
197 #define GPMC_CONFIG7_BASEADDRESS __BITS(5,0)
198 #define GPMC_CONFIG7_CSVALID __BIT(6)
199 #define GPMC_CONFIG7_MASKADDRESS __BITS(11,8)
201 static __inline ulong
202 omap_gpmc_config7_addr(uint32_t r)
204 return ((r) & GPMC_CONFIG7_BASEADDRESS) << 24;
206 static __inline ulong
207 omap_gpmc_config7_size(uint32_t r)
209 uint i;
210 uint mask;
211 const struct {
212 uint mask;
213 ulong size;
214 } gpmc_config7_size_tab[5] = {
215 { 0x0, (256 << 20) }, /* 256 MB */
216 { 0x8, (128 << 20) }, /* 128 MB */
217 { 0xc, ( 64 << 20) }, /* 64 MB */
218 { 0xe, ( 32 << 20) }, /* 32 MB */
219 { 0xf, ( 16 << 20) }, /* 16 MB */
221 mask = ((r) & GPMC_CONFIG7_MASKADDRESS) >> 8;
222 for (i=0; i < 5; i++) {
223 if (gpmc_config7_size_tab[i].mask == mask)
224 return gpmc_config7_size_tab[i].size;
226 return 0;
229 #endif /* _OMAP2430GPMCREG_H */