sys/arch/arm/omap/omap_a4x_space.c

   1 /*      $NetBSD: $ */
   2
   3 /*
   4  * Based on arch/arm/xscale/pxa2x0_a4x_space.c
   5  *
   6  * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
   7  * Written by Hiroyuki Bessho for Genetec Corporation.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Genetec Corporation.
  21  * 4. The name of Genetec Corporation may not be used to endorse or
  22  *    promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /*
  39  * Bus space tag for 8/16-bit devices on 32-bit bus.
  40  * all registers are located at the address of multiple of 4.
  41  */
  42
  43 #include <sys/cdefs.h>
  44 __KERNEL_RCSID(0, "$NetBSD: $");
  45
  46 #include <sys/param.h>
  47 #include <sys/systm.h>
  48
  49 #include <uvm/uvm_extern.h>
  50
  51 #include <machine/bus.h>
  52
  53 /* Prototypes for all the bus_space structure functions */
  54 bs_protos(omap);
  55 bs_protos(a4x);
  56 bs_protos(bs_notimpl);
  57
  58 struct bus_space omap_a4x_bs_tag = {
  59         /* cookie */
  60         (void *) 0,
  61
  62         /* mapping/unmapping */
  63         omap_bs_map,
  64         omap_bs_unmap,
  65         omap_bs_subregion,
  66
  67         /* allocation/deallocation */
  68         omap_bs_alloc,  /* not implemented */
  69         omap_bs_free,           /* not implemented */
  70
  71         /* get kernel virtual address */
  72         omap_bs_vaddr,
  73
  74         /* mmap */
  75         bs_notimpl_bs_mmap,
  76
  77         /* barrier */
  78         omap_bs_barrier,
  79
  80         /* read (single) */
  81         a4x_bs_r_1,
  82         a4x_bs_r_2,
  83         a4x_bs_r_4,
  84         bs_notimpl_bs_r_8,
  85
  86         /* read multiple */
  87         a4x_bs_rm_1,
  88         a4x_bs_rm_2,
  89         bs_notimpl_bs_rm_4,
  90         bs_notimpl_bs_rm_8,
  91
  92         /* read region */
  93         bs_notimpl_bs_rr_1,
  94         bs_notimpl_bs_rr_2,
  95         bs_notimpl_bs_rr_4,
  96         bs_notimpl_bs_rr_8,
  97
  98         /* write (single) */
  99         a4x_bs_w_1,
 100         a4x_bs_w_2,
 101         a4x_bs_w_4,
 102         bs_notimpl_bs_w_8,
 103
 104         /* write multiple */
 105         a4x_bs_wm_1,
 106         a4x_bs_wm_2,
 107         bs_notimpl_bs_wm_4,
 108         bs_notimpl_bs_wm_8,
 109
 110         /* write region */
 111         bs_notimpl_bs_wr_1,
 112         bs_notimpl_bs_wr_2,
 113         bs_notimpl_bs_wr_4,
 114         bs_notimpl_bs_wr_8,
 115
 116         /* set multiple */
 117         bs_notimpl_bs_sm_1,
 118         bs_notimpl_bs_sm_2,
 119         bs_notimpl_bs_sm_4,
 120         bs_notimpl_bs_sm_8,
 121
 122         /* set region */
 123         bs_notimpl_bs_sr_1,
 124         bs_notimpl_bs_sr_2,
 125         bs_notimpl_bs_sr_4,
 126         bs_notimpl_bs_sr_8,
 127
 128         /* copy */
 129         bs_notimpl_bs_c_1,
 130         bs_notimpl_bs_c_2,
 131         bs_notimpl_bs_c_4,
 132         bs_notimpl_bs_c_8,
 133 };
 134
 135
 136