sys/arch/arm/xscale/i80312_space.c

   1 /*      $NetBSD: i80312_space.c,v 1.8 2005/04/01 11:59:25 yamt Exp $    */
   2
   3 /*
   4  * Copyright (c) 2001 Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /*
  39  * bus_space functions for i80312 Companion I/O chip.
  40  */
  41
  42 #include <sys/cdefs.h>
  43 __KERNEL_RCSID(0, "$NetBSD: i80312_space.c,v 1.8 2005/04/01 11:59:25 yamt Exp $");
  44
  45 #include <sys/param.h>
  46 #include <sys/systm.h>
  47
  48 #include <uvm/uvm_extern.h>
  49
  50 #include <machine/bus.h>
  51
  52 #include <arm/xscale/i80312reg.h>
  53 #include <arm/xscale/i80312var.h>
  54
  55 /* Prototypes for all the bus_space structure functions */
  56 bs_protos(i80312);
  57 bs_protos(i80312_io);
  58 bs_protos(i80312_mem);
  59 bs_protos(generic);
  60 bs_protos(generic_armv4);
  61 bs_protos(bs_notimpl);
  62
  63 /*
  64  * Template bus_space -- copied, and the bits that are NULL are
  65  * filled in.
  66  */
  67 const struct bus_space i80312_bs_tag_template = {
  68         /* cookie */
  69         (void *) 0,
  70
  71         /* mapping/unmapping */
  72         NULL,
  73         NULL,
  74         i80312_bs_subregion,
  75
  76         /* allocation/deallocation */
  77         NULL,
  78         NULL,
  79
  80         /* get kernel virtual address */
  81         i80312_bs_vaddr,
  82
  83         /* mmap */
  84         i80312_bs_mmap,
  85
  86         /* barrier */
  87         i80312_bs_barrier,
  88
  89         /* read (single) */
  90         generic_bs_r_1,
  91         generic_armv4_bs_r_2,
  92         generic_bs_r_4,
  93         bs_notimpl_bs_r_8,
  94
  95         /* read multiple */
  96         generic_bs_rm_1,
  97         generic_armv4_bs_rm_2,
  98         generic_bs_rm_4,
  99         bs_notimpl_bs_rm_8,
 100
 101         /* read region */
 102         bs_notimpl_bs_rr_1,
 103         generic_armv4_bs_rr_2,
 104         generic_bs_rr_4,
 105         bs_notimpl_bs_rr_8,
 106
 107         /* write (single) */
 108         generic_bs_w_1,
 109         generic_armv4_bs_w_2,
 110         generic_bs_w_4,
 111         bs_notimpl_bs_w_8,
 112
 113         /* write multiple */
 114         generic_bs_wm_1,
 115         generic_armv4_bs_wm_2,
 116         generic_bs_wm_4,
 117         bs_notimpl_bs_wm_8,
 118
 119         /* write region */
 120         bs_notimpl_bs_wr_1,
 121         generic_armv4_bs_wr_2,
 122         generic_bs_wr_4,
 123         bs_notimpl_bs_wr_8,
 124
 125         /* set multiple */
 126         bs_notimpl_bs_sm_1,
 127         bs_notimpl_bs_sm_2,
 128         bs_notimpl_bs_sm_4,
 129         bs_notimpl_bs_sm_8,
 130
 131         /* set region */
 132         bs_notimpl_bs_sr_1,
 133         generic_armv4_bs_sr_2,
 134         generic_bs_sr_4,
 135         bs_notimpl_bs_sr_8,
 136
 137         /* copy */
 138         bs_notimpl_bs_c_1,
 139         generic_armv4_bs_c_2,
 140         bs_notimpl_bs_c_4,
 141         bs_notimpl_bs_c_8,
 142 };
 143
 144 void
 145 i80312_bs_init(bus_space_tag_t bs, void *cookie)
 146 {
 147
 148         *bs = i80312_bs_tag_template;
 149         bs->bs_cookie = cookie;
 150 }
 151
 152 void
 153 i80312_io_bs_init(bus_space_tag_t bs, void *cookie)
 154 {
 155
 156         *bs = i80312_bs_tag_template;
 157         bs->bs_cookie = cookie;
 158
 159         bs->bs_map = i80312_io_bs_map;
 160         bs->bs_unmap = i80312_io_bs_unmap;
 161         bs->bs_alloc = i80312_io_bs_alloc;
 162         bs->bs_free = i80312_io_bs_free;
 163
 164         bs->bs_vaddr = i80312_io_bs_vaddr;
 165 }
 166
 167 void
 168 i80312_mem_bs_init(bus_space_tag_t bs, void *cookie)
 169 {
 170
 171         *bs = i80312_bs_tag_template;
 172         bs->bs_cookie = cookie;
 173
 174         bs->bs_map = i80312_mem_bs_map;
 175         bs->bs_unmap = i80312_mem_bs_unmap;
 176         bs->bs_alloc = i80312_mem_bs_alloc;
 177         bs->bs_free = i80312_mem_bs_free;
 178
 179         bs->bs_mmap = i80312_mem_bs_mmap;
 180 }
 181
 182 /* *** Routines shared by i80312, PCI IO, and PCI MEM. *** */
 183
 184 int
 185 i80312_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
 186     bus_size_t size, bus_space_handle_t *nbshp)
 187 {
 188
 189         *nbshp = bsh + offset;
 190         return (0);
 191 }
 192
 193 void
 194 i80312_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
 195     bus_size_t len, int flags)
 196 {
 197
 198         /* Nothing to do. */
 199 }
 200
 201 void *
 202 i80312_bs_vaddr(void *t, bus_space_handle_t bsh)
 203 {
 204
 205         return ((void *)bsh);
 206 }
 207
 208 paddr_t
 209 i80312_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
 210 {
 211
 212         /* Not supported. */
 213         return (-1);
 214 }
 215
 216 /* *** Routines for PCI IO. *** */
 217
 218 int
 219 i80312_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
 220     bus_space_handle_t *bshp)
 221 {
 222         struct i80312_softc *sc = t;
 223         vaddr_t winvaddr;
 224         uint32_t busbase, bussize;
 225
 226         if (bpa >= sc->sc_pioout_base &&
 227             bpa < (sc->sc_pioout_base + sc->sc_pioout_size)) {
 228                 busbase = sc->sc_pioout_base;
 229                 bussize = sc->sc_pioout_size;
 230                 winvaddr = sc->sc_piow_vaddr;
 231         } else if (bpa >= sc->sc_sioout_base &&
 232                    bpa < (sc->sc_sioout_base + sc->sc_sioout_size)) {
 233                 busbase = sc->sc_sioout_base;
 234                 bussize = sc->sc_sioout_size;
 235                 winvaddr = sc->sc_siow_vaddr;
 236         } else
 237                 return (EINVAL);
 238
 239         if ((bpa + size) >= (busbase + bussize))
 240                 return (EINVAL);
 241
 242         /*
 243          * Found the window -- PCI I/O space is mapped at a fixed
 244          * virtual address by board-specific code.  Translate the
 245          * bus address to the virtual address.
 246          */
 247         *bshp = winvaddr + (bpa - busbase);
 248
 249         return (0);
 250 }
 251
 252 void
 253 i80312_io_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
 254 {
 255
 256         /* Nothing to do. */
 257 }
 258
 259 int
 260 i80312_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
 261     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
 262     bus_addr_t *bpap, bus_space_handle_t *bshp)
 263 {
 264
 265         panic("i80312_io_bs_alloc(): not implemented");
 266 }
 267
 268 void
 269 i80312_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
 270 {
 271
 272         panic("i80312_io_bs_free(): not implemented");
 273 }
 274
 275 void *
 276 i80312_io_bs_vaddr(void *t, bus_space_handle_t bsh)
 277 {
 278
 279         /* Not supported. */
 280         return (NULL);
 281 }
 282
 283 /* *** Routines for PCI MEM. *** */
 284
 285 int
 286 i80312_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
 287     bus_space_handle_t *bshp)
 288 {
 289
 290         struct i80312_softc *sc = t;
 291         vaddr_t va;
 292         uint32_t busbase, bussize;
 293         paddr_t pa, endpa, physbase;
 294
 295         if (bpa >= sc->sc_pmemout_base &&
 296             bpa < (sc->sc_pmemout_base + sc->sc_pmemout_size)) {
 297                 busbase = sc->sc_pmemout_base;
 298                 bussize = sc->sc_pmemout_size;
 299                 physbase = I80312_PCI_XLATE_PMW_BASE;
 300         } else if (bpa >= sc->sc_smemout_base &&
 301                    bpa < (sc->sc_smemout_base + sc->sc_smemout_size)) {
 302                 busbase = sc->sc_smemout_base;
 303                 bussize = sc->sc_smemout_size;
 304                 physbase = I80312_PCI_XLATE_SMW_BASE;
 305         } else
 306                 return (EINVAL);
 307
 308         if ((bpa + size) >= (busbase + bussize))
 309                 return (EINVAL);
 310
 311         /*
 312          * Found the window -- PCI MEM space is not mapped by allocating
 313          * some kernel VA space and mapping the pages with pmap_enter().
 314          * pmap_enter() will map unmanaged pages as non-cacheable.
 315          */
 316         pa = trunc_page((bpa - busbase) + physbase);
 317         endpa = round_page(((bpa - busbase) + physbase) + size);
 318
 319         va = uvm_km_alloc(kernel_map, endpa - pa, 0,
 320             UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
 321         if (va == 0)
 322                 return (ENOMEM);
 323
 324         *bshp = va + (bpa & PAGE_MASK);
 325
 326         for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
 327                 pmap_enter(pmap_kernel(), va, pa,
 328                     VM_PROT_READ | VM_PROT_WRITE,
 329                     VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
 330         }
 331         pmap_update(pmap_kernel());
 332
 333         return (0);
 334 }
 335
 336 void
 337 i80312_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
 338 {
 339         vaddr_t va, endva;
 340
 341         va = trunc_page(bsh);
 342         endva = round_page(bsh + size);
 343
 344         /* Free the kernel virtual mapping. */
 345         pmap_remove(pmap_kernel(), va, endva);
 346         pmap_update(pmap_kernel());
 347         uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
 348 }
 349
 350 int
 351 i80312_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
 352     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
 353     bus_addr_t *bpap, bus_space_handle_t *bshp)
 354 {
 355
 356         panic("i80312_mem_bs_alloc(): not implemented");
 357 }
 358
 359 void
 360 i80312_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
 361 {
 362
 363         panic("i80312_mem_bs_free(): not implemented");
 364 }
 365
 366 paddr_t
 367 i80312_mem_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
 368 {
 369
 370         /* XXX */
 371         return (-1);
 372 }