sys/arch/arm/xscale/i80321_space.c

   1 /*      $NetBSD: i80321_space.c,v 1.9.38.1 2007/05/22 17:26:41 matt Exp $       */
   2
   3 /*
   4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /*
  39  * bus_space functions for i80321 I/O Processor.
  40  */
  41
  42 #include <sys/cdefs.h>
  43 __KERNEL_RCSID(0, "$NetBSD: i80321_space.c,v 1.9.38.1 2007/05/22 17:26:41 matt Exp $");
  44
  45 #include <sys/param.h>
  46 #include <sys/systm.h>
  47
  48 #include <uvm/uvm_extern.h>
  49
  50 #include <machine/bus.h>
  51
  52 #include <arm/xscale/i80321reg.h>
  53 #include <arm/xscale/i80321var.h>
  54
  55 #include "opt_i80321.h"
  56
  57 /* Prototypes for all the bus_space structure functions */
  58 bs_protos(i80321);
  59 bs_protos(i80321_io);
  60 bs_protos(i80321_mem);
  61 bs_protos(generic);
  62 bs_protos(generic_armv4);
  63 bs_protos(bs_notimpl);
  64
  65 /*
  66  * Template bus_space -- copied, and the bits that are NULL are
  67  * filled in.
  68  */
  69 const struct bus_space i80321_bs_tag_template = {
  70         /* cookie */
  71         (void *) 0,
  72
  73         /* mapping/unmapping */
  74         NULL,
  75         NULL,
  76         i80321_bs_subregion,
  77
  78         /* allocation/deallocation */
  79         NULL,
  80         NULL,
  81
  82         /* get kernel virtual address */
  83         i80321_bs_vaddr,
  84
  85         /* mmap */
  86         i80321_bs_mmap,
  87
  88         /* barrier */
  89         i80321_bs_barrier,
  90
  91         /* read (single) */
  92         generic_bs_r_1,
  93         generic_armv4_bs_r_2,
  94         generic_bs_r_4,
  95         bs_notimpl_bs_r_8,
  96
  97         /* read multiple */
  98         generic_bs_rm_1,
  99         generic_armv4_bs_rm_2,
 100         generic_bs_rm_4,
 101         bs_notimpl_bs_rm_8,
 102
 103         /* read region */
 104         generic_bs_rr_1,
 105         generic_armv4_bs_rr_2,
 106         generic_bs_rr_4,
 107         bs_notimpl_bs_rr_8,
 108
 109         /* write (single) */
 110         generic_bs_w_1,
 111         generic_armv4_bs_w_2,
 112         generic_bs_w_4,
 113         bs_notimpl_bs_w_8,
 114
 115         /* write multiple */
 116         generic_bs_wm_1,
 117         generic_armv4_bs_wm_2,
 118         generic_bs_wm_4,
 119         bs_notimpl_bs_wm_8,
 120
 121         /* write region */
 122         generic_bs_wr_1,
 123         generic_armv4_bs_wr_2,
 124         generic_bs_wr_4,
 125         bs_notimpl_bs_wr_8,
 126
 127         /* set multiple */
 128         bs_notimpl_bs_sm_1,
 129         bs_notimpl_bs_sm_2,
 130         bs_notimpl_bs_sm_4,
 131         bs_notimpl_bs_sm_8,
 132
 133         /* set region */
 134         bs_notimpl_bs_sr_1,
 135         generic_armv4_bs_sr_2,
 136         generic_bs_sr_4,
 137         bs_notimpl_bs_sr_8,
 138
 139         /* copy */
 140         bs_notimpl_bs_c_1,
 141         generic_armv4_bs_c_2,
 142         bs_notimpl_bs_c_4,
 143         bs_notimpl_bs_c_8,
 144 };
 145
 146 void
 147 i80321_bs_init(bus_space_tag_t bs, void *cookie)
 148 {
 149
 150         *bs = i80321_bs_tag_template;
 151         bs->bs_cookie = cookie;
 152 }
 153
 154 void
 155 i80321_io_bs_init(bus_space_tag_t bs, void *cookie)
 156 {
 157
 158         *bs = i80321_bs_tag_template;
 159         bs->bs_cookie = cookie;
 160
 161         bs->bs_map = i80321_io_bs_map;
 162         bs->bs_unmap = i80321_io_bs_unmap;
 163         bs->bs_alloc = i80321_io_bs_alloc;
 164         bs->bs_free = i80321_io_bs_free;
 165
 166         bs->bs_vaddr = i80321_io_bs_vaddr;
 167 }
 168
 169 void
 170 i80321_mem_bs_init(bus_space_tag_t bs, void *cookie)
 171 {
 172
 173         *bs = i80321_bs_tag_template;
 174         bs->bs_cookie = cookie;
 175
 176         bs->bs_map = i80321_mem_bs_map;
 177         bs->bs_unmap = i80321_mem_bs_unmap;
 178         bs->bs_alloc = i80321_mem_bs_alloc;
 179         bs->bs_free = i80321_mem_bs_free;
 180
 181         bs->bs_mmap = i80321_mem_bs_mmap;
 182 }
 183
 184 /* *** Routines shared by i80321, PCI IO, and PCI MEM. *** */
 185
 186 int
 187 i80321_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
 188     bus_size_t size, bus_space_handle_t *nbshp)
 189 {
 190
 191         *nbshp = bsh + offset;
 192         return (0);
 193 }
 194
 195 void
 196 i80321_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
 197     bus_size_t len, int flags)
 198 {
 199
 200         /* Nothing to do. */
 201 }
 202
 203 void *
 204 i80321_bs_vaddr(void *t, bus_space_handle_t bsh)
 205 {
 206
 207         return ((void *)bsh);
 208 }
 209
 210 paddr_t
 211 i80321_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
 212 {
 213
 214         /* Not supported. */
 215         return (-1);
 216 }
 217
 218 /* *** Routines for PCI IO. *** */
 219
 220 int
 221 i80321_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
 222     bus_space_handle_t *bshp)
 223 {
 224         struct i80321_softc *sc = t;
 225         vaddr_t winvaddr;
 226         uint32_t busbase;
 227
 228         if (bpa >= sc->sc_ioout_xlate &&
 229             bpa < (sc->sc_ioout_xlate + VERDE_OUT_XLATE_IO_WIN_SIZE)) {
 230                 busbase = sc->sc_ioout_xlate;
 231                 winvaddr = sc->sc_iow_vaddr;
 232         } else
 233                 return (EINVAL);
 234
 235         if ((bpa + size) >= (busbase + VERDE_OUT_XLATE_IO_WIN_SIZE))
 236                 return (EINVAL);
 237
 238         /*
 239          * Found the window -- PCI I/O space is mapped at a fixed
 240          * virtual address by board-specific code.  Translate the
 241          * bus address to the virtual address.
 242          */
 243         *bshp = winvaddr + (bpa - busbase);
 244
 245         return (0);
 246 }
 247
 248 void
 249 i80321_io_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
 250 {
 251
 252         /* Nothing to do. */
 253 }
 254
 255 int
 256 i80321_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
 257     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
 258     bus_addr_t *bpap, bus_space_handle_t *bshp)
 259 {
 260
 261         panic("i80321_io_bs_alloc(): not implemented");
 262 }
 263
 264 void
 265 i80321_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
 266 {
 267
 268         panic("i80321_io_bs_free(): not implemented");
 269 }
 270
 271 void *
 272 i80321_io_bs_vaddr(void *t, bus_space_handle_t bsh)
 273 {
 274
 275         /* Not supported. */
 276         return (NULL);
 277 }
 278
 279 /* *** Routines for PCI MEM. *** */
 280
 281 int
 282 i80321_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
 283     bus_space_handle_t *bshp)
 284 {
 285
 286 #ifndef I80321_USE_DIRECT_WIN
 287         struct i80321_softc *sc = t;
 288 #endif
 289         vaddr_t va;
 290         uint32_t busbase;
 291         paddr_t pa, endpa, physbase;
 292
 293 #ifdef I80321_USE_DIRECT_WIN
 294         if (bpa >= (VERDE_OUT_DIRECT_WIN_BASE) &&
 295             bpa < (VERDE_OUT_DIRECT_WIN_BASE + VERDE_OUT_DIRECT_WIN_SIZE)) {
 296                 busbase = VERDE_OUT_DIRECT_WIN_BASE;
 297                 physbase = VERDE_OUT_DIRECT_WIN_BASE;
 298         } else
 299                 return (EINVAL);
 300         if ((bpa + size) >= (VERDE_OUT_DIRECT_WIN_BASE +
 301             VERDE_OUT_DIRECT_WIN_SIZE))
 302                 return (EINVAL);
 303 #else
 304         if (bpa >= sc->sc_owin[0].owin_xlate_lo &&
 305             bpa < (sc->sc_owin[0].owin_xlate_lo +
 306                    VERDE_OUT_XLATE_MEM_WIN_SIZE)) {
 307                 busbase = sc->sc_owin[0].owin_xlate_lo;
 308                 physbase = sc->sc_iwin[1].iwin_xlate;
 309         } else
 310                 return (EINVAL);
 311
 312         if ((bpa + size) >= (busbase + VERDE_OUT_XLATE_MEM_WIN_SIZE))
 313                 return (EINVAL);
 314 #endif
 315
 316         /*
 317          * Found the window -- PCI MEM space is not mapped by allocating
 318          * some kernel VA space and mapping the pages with pmap_enter().
 319          * pmap_enter() will map unmanaged pages as non-cacheable.
 320          */
 321         pa = trunc_page((bpa - busbase) + physbase);
 322         endpa = round_page(((bpa - busbase) + physbase) + size);
 323
 324         va = uvm_km_alloc(kernel_map, endpa - pa, 0,
 325             UVM_KMF_VAONLY | UVM_KMF_NOWAIT);
 326         if (va == 0)
 327                 return (ENOMEM);
 328
 329         *bshp = va + (bpa & PAGE_MASK);
 330
 331         for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
 332                 pmap_enter(pmap_kernel(), va, pa,
 333                     VM_PROT_READ | VM_PROT_WRITE,
 334                     VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
 335         }
 336         pmap_update(pmap_kernel());
 337
 338         return (0);
 339 }
 340
 341 void
 342 i80321_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
 343 {
 344         vaddr_t va, endva;
 345
 346         va = trunc_page(bsh);
 347         endva = round_page(bsh + size);
 348
 349         pmap_remove(pmap_kernel(), va, endva - va);
 350         pmap_update(pmap_kernel());
 351
 352         /* Free the kernel virtual mapping. */
 353         uvm_km_free(kernel_map, va, endva - va, UVM_KMF_VAONLY);
 354 }
 355
 356 int
 357 i80321_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
 358     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
 359     bus_addr_t *bpap, bus_space_handle_t *bshp)
 360 {
 361
 362         panic("i80321_mem_bs_alloc(): not implemented");
 363 }
 364
 365 void
 366 i80321_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
 367 {
 368
 369         panic("i80321_mem_bs_free(): not implemented");
 370 }
 371
 372 paddr_t
 373 i80321_mem_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
 374 {
 375
 376         /* XXX */
 377         return (-1);
 378 }