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[netbsd-mini2440.git] / sys / arch / atari / include / bus.h
blobe22b199f12f086729ca8ee2d6ddf9c699b18e14f
1 /* $NetBSD: bus.h,v 1.38 2009/03/05 13:00:45 tsutsui Exp $ */
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
34 * Copyright (c) 1996 Carnegie-Mellon University.
35 * All rights reserved.
37 * Author: Chris G. Demetriou
39 * Permission to use, copy, modify and distribute this software and
40 * its documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49 * Carnegie Mellon requests users of this software to return to
51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
56 * any improvements or extensions that they make and grant Carnegie the
57 * rights to redistribute these changes.
60 #ifndef _ATARI_BUS_H_
61 #define _ATARI_BUS_H_
64 * I/O addresses (in bus space)
66 typedef u_long bus_io_addr_t;
67 typedef u_long bus_io_size_t;
70 * Memory addresses (in bus space)
72 typedef u_long bus_addr_t;
73 typedef u_long bus_size_t;
75 #define __BUS_SPACE_HAS_STREAM_METHODS
78 * Access methods for bus resources and address space.
80 typedef struct atari_bus_space *bus_space_tag_t;
81 typedef u_long bus_space_handle_t;
83 #define BUS_SPACE_MAP_CACHEABLE 0x01
84 #define BUS_SPACE_MAP_LINEAR 0x02
85 #define BUS_SPACE_MAP_PREFETCHABLE 0x04
87 int bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t, bus_size_t,
88 bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
89 int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
90 bus_space_handle_t *);
91 void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
92 int bus_space_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t,
93 bus_size_t, bus_space_handle_t *);
96 * Tag allocation
98 bus_space_tag_t beb_alloc_bus_space_tag(bus_space_tag_t);
99 bus_space_tag_t leb_alloc_bus_space_tag(bus_space_tag_t);
102 * XXX
104 bus_space_tag_t mb_alloc_bus_space_tag(void);
105 void mb_free_bus_space_tag(bus_space_tag_t);
108 * Structure containing functions and other feature-data that might differ
109 * between the various bus spaces on the atari. Currently 'known' bus
110 * spaces are: ISA, PCI, VME and 'mainbus'.
112 struct atari_bus_space {
113 u_long base;
115 /* XXX Next 2 lines can be turned into an opaque cookie */
116 int stride;
117 int wo_1, wo_2, wo_4, wo_8;
119 /* Autoconf detection stuff */
120 int (*abs_p_1)(bus_space_tag_t, bus_space_handle_t,
121 bus_size_t);
122 int (*abs_p_2)(bus_space_tag_t, bus_space_handle_t,
123 bus_size_t);
124 int (*abs_p_4)(bus_space_tag_t, bus_space_handle_t,
125 bus_size_t);
126 int (*abs_p_8)(bus_space_tag_t, bus_space_handle_t,
127 bus_size_t);
129 /* read (single) */
130 uint8_t (*abs_r_1)(bus_space_tag_t, bus_space_handle_t,
131 bus_size_t);
132 uint16_t (*abs_r_2)(bus_space_tag_t, bus_space_handle_t,
133 bus_size_t);
134 uint32_t (*abs_r_4)(bus_space_tag_t, bus_space_handle_t,
135 bus_size_t);
136 uint64_t (*abs_r_8)(bus_space_tag_t, bus_space_handle_t,
137 bus_size_t);
139 /* read (single) stream */
140 uint8_t (*abs_rs_1)(bus_space_tag_t, bus_space_handle_t,
141 bus_size_t);
142 uint16_t (*abs_rs_2)(bus_space_tag_t, bus_space_handle_t,
143 bus_size_t);
144 uint32_t (*abs_rs_4)(bus_space_tag_t, bus_space_handle_t,
145 bus_size_t);
146 uint64_t (*abs_rs_8)(bus_space_tag_t, bus_space_handle_t,
147 bus_size_t);
149 /* read multiple */
150 void (*abs_rm_1)(bus_space_tag_t, bus_space_handle_t,
151 bus_size_t, uint8_t *, bus_size_t);
152 void (*abs_rm_2)(bus_space_tag_t, bus_space_handle_t,
153 bus_size_t, uint16_t *, bus_size_t);
154 void (*abs_rm_4)(bus_space_tag_t, bus_space_handle_t,
155 bus_size_t, uint32_t *, bus_size_t);
156 void (*abs_rm_8)(bus_space_tag_t, bus_space_handle_t,
157 bus_size_t, uint64_t *, bus_size_t);
159 /* read multiple stream */
160 void (*abs_rms_1)(bus_space_tag_t, bus_space_handle_t,
161 bus_size_t, uint8_t *, bus_size_t);
162 void (*abs_rms_2)(bus_space_tag_t, bus_space_handle_t,
163 bus_size_t, uint16_t *, bus_size_t);
164 void (*abs_rms_4)(bus_space_tag_t, bus_space_handle_t,
165 bus_size_t, uint32_t *, bus_size_t);
166 void (*abs_rms_8)(bus_space_tag_t, bus_space_handle_t,
167 bus_size_t, uint64_t *, bus_size_t);
169 /* read region */
170 void (*abs_rr_1)(bus_space_tag_t, bus_space_handle_t,
171 bus_size_t, uint8_t *, bus_size_t);
172 void (*abs_rr_2)(bus_space_tag_t, bus_space_handle_t,
173 bus_size_t, uint16_t *, bus_size_t);
174 void (*abs_rr_4)(bus_space_tag_t, bus_space_handle_t,
175 bus_size_t, uint32_t *, bus_size_t);
176 void (*abs_rr_8)(bus_space_tag_t, bus_space_handle_t,
177 bus_size_t, uint64_t *, bus_size_t);
179 /* read region stream */
180 void (*abs_rrs_1)(bus_space_tag_t, bus_space_handle_t,
181 bus_size_t, uint8_t *, bus_size_t);
182 void (*abs_rrs_2)(bus_space_tag_t, bus_space_handle_t,
183 bus_size_t, uint16_t *, bus_size_t);
184 void (*abs_rrs_4)(bus_space_tag_t, bus_space_handle_t,
185 bus_size_t, uint32_t *, bus_size_t);
186 void (*abs_rrs_8)(bus_space_tag_t, bus_space_handle_t,
187 bus_size_t, uint64_t *, bus_size_t);
189 /* write (single) */
190 void (*abs_w_1)(bus_space_tag_t, bus_space_handle_t,
191 bus_size_t, uint8_t);
192 void (*abs_w_2)(bus_space_tag_t, bus_space_handle_t,
193 bus_size_t, uint16_t);
194 void (*abs_w_4)(bus_space_tag_t, bus_space_handle_t,
195 bus_size_t, uint32_t);
196 void (*abs_w_8)(bus_space_tag_t, bus_space_handle_t,
197 bus_size_t, uint64_t);
199 /* write (single) stream */
200 void (*abs_ws_1)(bus_space_tag_t, bus_space_handle_t,
201 bus_size_t, uint8_t);
202 void (*abs_ws_2)(bus_space_tag_t, bus_space_handle_t,
203 bus_size_t, uint16_t);
204 void (*abs_ws_4)(bus_space_tag_t, bus_space_handle_t,
205 bus_size_t, uint32_t);
206 void (*abs_ws_8)(bus_space_tag_t, bus_space_handle_t,
207 bus_size_t, uint64_t);
209 /* write multiple */
210 void (*abs_wm_1)(bus_space_tag_t, bus_space_handle_t,
211 bus_size_t, const uint8_t *, bus_size_t);
212 void (*abs_wm_2)(bus_space_tag_t, bus_space_handle_t,
213 bus_size_t, const uint16_t *, bus_size_t);
214 void (*abs_wm_4)(bus_space_tag_t, bus_space_handle_t,
215 bus_size_t, const uint32_t *, bus_size_t);
216 void (*abs_wm_8)(bus_space_tag_t, bus_space_handle_t,
217 bus_size_t, const uint64_t *, bus_size_t);
219 /* write multiple stream */
220 void (*abs_wms_1)(bus_space_tag_t, bus_space_handle_t,
221 bus_size_t, const uint8_t *, bus_size_t);
222 void (*abs_wms_2)(bus_space_tag_t, bus_space_handle_t,
223 bus_size_t, const uint16_t *, bus_size_t);
224 void (*abs_wms_4)(bus_space_tag_t, bus_space_handle_t,
225 bus_size_t, const uint32_t *, bus_size_t);
226 void (*abs_wms_8)(bus_space_tag_t, bus_space_handle_t,
227 bus_size_t, const uint64_t *, bus_size_t);
229 /* write region */
230 void (*abs_wr_1)(bus_space_tag_t, bus_space_handle_t,
231 bus_size_t, const uint8_t *, bus_size_t);
232 void (*abs_wr_2)(bus_space_tag_t, bus_space_handle_t,
233 bus_size_t, const uint16_t *, bus_size_t);
234 void (*abs_wr_4)(bus_space_tag_t, bus_space_handle_t,
235 bus_size_t, const uint32_t *, bus_size_t);
236 void (*abs_wr_8)(bus_space_tag_t, bus_space_handle_t,
237 bus_size_t, const uint64_t *, bus_size_t);
239 /* write region stream */
240 void (*abs_wrs_1)(bus_space_tag_t, bus_space_handle_t,
241 bus_size_t, const uint8_t *, bus_size_t);
242 void (*abs_wrs_2)(bus_space_tag_t, bus_space_handle_t,
243 bus_size_t, const uint16_t *, bus_size_t);
244 void (*abs_wrs_4)(bus_space_tag_t, bus_space_handle_t,
245 bus_size_t, const uint32_t *, bus_size_t);
246 void (*abs_wrs_8)(bus_space_tag_t, bus_space_handle_t,
247 bus_size_t, const uint64_t *, bus_size_t);
249 /* set multiple */
250 void (*abs_sm_1)(bus_space_tag_t, bus_space_handle_t,
251 bus_size_t, uint8_t, bus_size_t);
252 void (*abs_sm_2)(bus_space_tag_t, bus_space_handle_t,
253 bus_size_t, uint16_t, bus_size_t);
254 void (*abs_sm_4)(bus_space_tag_t, bus_space_handle_t,
255 bus_size_t, uint32_t, bus_size_t);
256 void (*abs_sm_8)(bus_space_tag_t, bus_space_handle_t,
257 bus_size_t, uint64_t, bus_size_t);
259 /* set region */
260 void (*abs_sr_1)(bus_space_tag_t, bus_space_handle_t,
261 bus_size_t, uint8_t, bus_size_t);
262 void (*abs_sr_2)(bus_space_tag_t, bus_space_handle_t,
263 bus_size_t, uint16_t, bus_size_t);
264 void (*abs_sr_4)(bus_space_tag_t, bus_space_handle_t,
265 bus_size_t, uint32_t, bus_size_t);
266 void (*abs_sr_8)(bus_space_tag_t, bus_space_handle_t,
267 bus_size_t, uint64_t, bus_size_t);
269 #if 0 /* See comment on __abs_copy below */
270 /* copy */
271 void (*abs_c_1)(bus_space_tag_t, bus_space_handle_t,
272 bus_size_t, bus_space_handle_t, bus_size_t,
273 bus_size_t);
274 void (*abs_c_2)(bus_space_tag_t, bus_space_handle_t,
275 bus_size_t, bus_space_handle_t, bus_size_t,
276 bus_size_t);
277 void (*abs_c_4)(bus_space_tag_t, bus_space_handle_t,
278 bus_size_t, bus_space_handle_t, bus_size_t,
279 bus_size_t);
280 void (*abs_c_8)(bus_space_tag_t, bus_space_handle_t,
281 bus_size_t, bus_space_handle_t, bus_size_t,
282 bus_size_t);
283 #endif
287 * Utility macros; INTERNAL USE ONLY.
289 #define __abs_c(a,b) __CONCAT(a,b)
290 #define __abs_opname(op,size) __abs_c(__abs_c(__abs_c(abs_,op),_),size)
292 #define __abs_p(sz, t, h, o) \
293 (*(t)->__abs_opname(p,sz))(t, h, o)
294 #define __abs_rs(sz, t, h, o) \
295 (*(t)->__abs_opname(r,sz))(t, h, o)
296 #define __abs_rss(sz, t, h, o) \
297 (*(t)->__abs_opname(rs,sz))(t, h, o)
298 #define __abs_ws(sz, t, h, o, v) \
299 (*(t)->__abs_opname(w,sz))(t, h, o, v)
300 #define __abs_wss(sz, t, h, o, v) \
301 (*(t)->__abs_opname(ws,sz))(t, h, o, v)
302 #define __abs_nonsingle(type, sz, t, h, o, a, c) \
303 (*(t)->__abs_opname(type,sz))(t, h, o, a, c)
304 #define __abs_set(type, sz, t, h, o, v, c) \
305 (*(t)->__abs_opname(type,sz))(t, h, o, v, c)
308 * No swaps needed and no other trickery, so it should be possible
309 * to shortcut these to memcpy() directly [ leo 19990107 ]
311 #if 0
312 #define __abs_copy(sz, t, h1, o1, h2, o2, cnt) \
313 (*(t)->__abs_opname(c,sz))(t, h1, o1, h2, o2, cnt)
314 #else
315 #define __abs_copy(sz, t, h1, o1, h2, o2, cnt) do { \
316 memcpy((void*)(h2 + o2), (void *)(h1 + o1), sz * cnt); \
317 (void)t; \
318 } while (0)
319 #endif
323 * Check accesibility of the location for various sized bus accesses
325 #define bus_space_peek_1(t, h, o) __abs_p(1,(t),(h),(o))
326 #define bus_space_peek_2(t, h, o) __abs_p(2,(t),(h),(o))
327 #define bus_space_peek_4(t, h, o) __abs_p(4,(t),(h),(o))
328 #define bus_space_peek_8(t, h, o) __abs_p(8,(t),(h),(o))
331 * Bus read (single) operations.
333 #define bus_space_read_1(t, h, o) __abs_rs(1,(t),(h),(o))
334 #define bus_space_read_2(t, h, o) __abs_rs(2,(t),(h),(o))
335 #define bus_space_read_4(t, h, o) __abs_rs(4,(t),(h),(o))
336 #define bus_space_read_8(t, h, o) __abs_rs(8,(t),(h),(o))
339 * Bus read (single) stream operations.
341 #define bus_space_read_stream_1(t, h, o) __abs_rss(1,(t),(h),(o))
342 #define bus_space_read_stream_2(t, h, o) __abs_rss(2,(t),(h),(o))
343 #define bus_space_read_stream_4(t, h, o) __abs_rss(4,(t),(h),(o))
344 #define bus_space_read_stream_8(t, h, o) __abs_rss(8,(t),(h),(o))
347 * Bus read multiple operations.
349 #define bus_space_read_multi_1(t, h, o, a, c) \
350 __abs_nonsingle(rm,1,(t),(h),(o),(a),(c))
351 #define bus_space_read_multi_2(t, h, o, a, c) \
352 __abs_nonsingle(rm,2,(t),(h),(o),(a),(c))
353 #define bus_space_read_multi_4(t, h, o, a, c) \
354 __abs_nonsingle(rm,4,(t),(h),(o),(a),(c))
355 #define bus_space_read_multi_8(t, h, o, a, c) \
356 __abs_nonsingle(rm,8,(t),(h),(o),(a),(c))
359 * Bus read multiple stream operations.
361 #define bus_space_read_multi_stream_1(t, h, o, a, c) \
362 __abs_nonsingle(rms,1,(t),(h),(o),(a),(c))
363 #define bus_space_read_multi_stream_2(t, h, o, a, c) \
364 __abs_nonsingle(rms,2,(t),(h),(o),(a),(c))
365 #define bus_space_read_multi_stream_4(t, h, o, a, c) \
366 __abs_nonsingle(rms,4,(t),(h),(o),(a),(c))
367 #define bus_space_read_multi_stream_8(t, h, o, a, c) \
368 __abs_nonsingle(rms,8,(t),(h),(o),(a),(c))
372 * Bus read region operations.
374 #define bus_space_read_region_1(t, h, o, a, c) \
375 __abs_nonsingle(rr,1,(t),(h),(o),(a),(c))
376 #define bus_space_read_region_2(t, h, o, a, c) \
377 __abs_nonsingle(rr,2,(t),(h),(o),(a),(c))
378 #define bus_space_read_region_4(t, h, o, a, c) \
379 __abs_nonsingle(rr,4,(t),(h),(o),(a),(c))
380 #define bus_space_read_region_8(t, h, o, a, c) \
381 __abs_nonsingle(rr,8,(t),(h),(o),(a),(c))
384 * Bus read region stream operations.
386 #define bus_space_read_region_stream_1(t, h, o, a, c) \
387 __abs_nonsingle(rrs,1,(t),(h),(o),(a),(c))
388 #define bus_space_read_region_stream_2(t, h, o, a, c) \
389 __abs_nonsingle(rrs,2,(t),(h),(o),(a),(c))
390 #define bus_space_read_region_stream_4(t, h, o, a, c) \
391 __abs_nonsingle(rrs,4,(t),(h),(o),(a),(c))
392 #define bus_space_read_region_stream_8(t, h, o, a, c) \
393 __abs_nonsingle(rrs,8,(t),(h),(o),(a),(c))
396 * Bus write (single) operations.
398 #define bus_space_write_1(t, h, o, v) __abs_ws(1,(t),(h),(o),(v))
399 #define bus_space_write_2(t, h, o, v) __abs_ws(2,(t),(h),(o),(v))
400 #define bus_space_write_4(t, h, o, v) __abs_ws(4,(t),(h),(o),(v))
401 #define bus_space_write_8(t, h, o, v) __abs_ws(8,(t),(h),(o),(v))
404 * Bus write (single) stream operations.
406 #define bus_space_write_stream_1(t, h, o, v) __abs_wss(1,(t),(h),(o),(v))
407 #define bus_space_write_stream_2(t, h, o, v) __abs_wss(2,(t),(h),(o),(v))
408 #define bus_space_write_stream_4(t, h, o, v) __abs_wss(4,(t),(h),(o),(v))
409 #define bus_space_write_stream_8(t, h, o, v) __abs_wss(8,(t),(h),(o),(v))
413 * Bus write multiple operations.
415 #define bus_space_write_multi_1(t, h, o, a, c) \
416 __abs_nonsingle(wm,1,(t),(h),(o),(a),(c))
417 #define bus_space_write_multi_2(t, h, o, a, c) \
418 __abs_nonsingle(wm,2,(t),(h),(o),(a),(c))
419 #define bus_space_write_multi_4(t, h, o, a, c) \
420 __abs_nonsingle(wm,4,(t),(h),(o),(a),(c))
421 #define bus_space_write_multi_8(t, h, o, a, c) \
422 __abs_nonsingle(wm,8,(t),(h),(o),(a),(c))
425 * Bus write multiple stream operations.
427 #define bus_space_write_multi_stream_1(t, h, o, a, c) \
428 __abs_nonsingle(wms,1,(t),(h),(o),(a),(c))
429 #define bus_space_write_multi_stream_2(t, h, o, a, c) \
430 __abs_nonsingle(wms,2,(t),(h),(o),(a),(c))
431 #define bus_space_write_multi_stream_4(t, h, o, a, c) \
432 __abs_nonsingle(wms,4,(t),(h),(o),(a),(c))
433 #define bus_space_write_multi_stream_8(t, h, o, a, c) \
434 __abs_nonsingle(wms,8,(t),(h),(o),(a),(c))
438 * Bus write region operations.
440 #define bus_space_write_region_1(t, h, o, a, c) \
441 __abs_nonsingle(wr,1,(t),(h),(o),(a),(c))
442 #define bus_space_write_region_2(t, h, o, a, c) \
443 __abs_nonsingle(wr,2,(t),(h),(o),(a),(c))
444 #define bus_space_write_region_4(t, h, o, a, c) \
445 __abs_nonsingle(wr,4,(t),(h),(o),(a),(c))
446 #define bus_space_write_region_8(t, h, o, a, c) \
447 __abs_nonsingle(wr,8,(t),(h),(o),(a),(c))
450 * Bus write region stream operations.
452 #define bus_space_write_region_stream_1(t, h, o, a, c) \
453 __abs_nonsingle(wrs,1,(t),(h),(o),(a),(c))
454 #define bus_space_write_region_stream_2(t, h, o, a, c) \
455 __abs_nonsingle(wrs,2,(t),(h),(o),(a),(c))
456 #define bus_space_write_region_stream_4(t, h, o, a, c) \
457 __abs_nonsingle(wrs,4,(t),(h),(o),(a),(c))
458 #define bus_space_write_region_stream_8(t, h, o, a, c) \
459 __abs_nonsingle(wrs,8,(t),(h),(o),(a),(c))
463 * Set multiple operations.
465 #define bus_space_set_multi_1(t, h, o, v, c) \
466 __abs_set(sm,1,(t),(h),(o),(v),(c))
467 #define bus_space_set_multi_2(t, h, o, v, c) \
468 __abs_set(sm,2,(t),(h),(o),(v),(c))
469 #define bus_space_set_multi_4(t, h, o, v, c) \
470 __abs_set(sm,4,(t),(h),(o),(v),(c))
471 #define bus_space_set_multi_8(t, h, o, v, c) \
472 __abs_set(sm,8,(t),(h),(o),(v),(c))
476 * Set region operations.
478 #define bus_space_set_region_1(t, h, o, v, c) \
479 __abs_set(sr,1,(t),(h),(o),(v),(c))
480 #define bus_space_set_region_2(t, h, o, v, c) \
481 __abs_set(sr,2,(t),(h),(o),(v),(c))
482 #define bus_space_set_region_4(t, h, o, v, c) \
483 __abs_set(sr,4,(t),(h),(o),(v),(c))
484 #define bus_space_set_region_8(t, h, o, v, c) \
485 __abs_set(sr,8,(t),(h),(o),(v),(c))
489 * Copy region operations.
491 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
492 __abs_copy(1, (t), (h1), (o1), (h2), (o2), (c))
493 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
494 __abs_copy(2, (t), (h1), (o1), (h2), (o2), (c))
495 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
496 __abs_copy(4, (t), (h1), (o1), (h2), (o2), (c))
497 #define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
498 __abs_copy(8, (t), (h1), (o1), (h2), (o2), (c))
501 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
503 * Get the kernel virtual address for the mapped bus space.
504 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
505 * (XXX not enforced)
507 #define bus_space_vaddr(t, h) ((void)(t), (void *)(h))
510 * paddr_t bus_space_mmap(bus_space_tag_t t, bus_addr_t base,
511 * off_t offset, int prot, int flags);
513 * Mmap an area of bus space.
516 paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
517 int, int);
519 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
522 * Bus read/write barrier methods.
524 * void bus_space_barrier(bus_space_tag_t tag,
525 * bus_space_handle_t bsh, bus_size_t offset,
526 * bus_size_t len, int flags);
528 * Note: the Atari does not currently require barriers, but we must
529 * provide the flags to MI code.
531 #define bus_space_barrier(t, h, o, l, f) \
532 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
533 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
534 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
538 * Flags used in various bus DMA methods.
540 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
541 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
542 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
543 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
544 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
545 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
546 #define BUS_DMA_BUS2 0x020
547 #define BUS_DMA_BUS3 0x040
548 #define BUS_DMA_BUS4 0x080
549 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
550 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
551 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
553 /* Forwards needed by prototypes below. */
554 struct mbuf;
555 struct uio;
558 * Operations performed by bus_dmamap_sync().
560 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
561 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
562 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
563 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
565 typedef struct atari_bus_dma_tag *bus_dma_tag_t;
566 typedef struct atari_bus_dmamap *bus_dmamap_t;
568 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
571 * bus_dma_segment_t
573 * Describes a single contiguous DMA transaction. Values
574 * are suitable for programming into DMA registers.
576 struct atari_bus_dma_segment {
577 bus_addr_t ds_addr; /* DMA address */
578 bus_size_t ds_len; /* length of transfer */
580 typedef struct atari_bus_dma_segment bus_dma_segment_t;
583 * bus_dma_tag_t
585 * A machine-dependent opaque type describing the implementation of
586 * DMA for a given bus.
588 struct atari_bus_dma_tag {
590 * The `bounce threshold' is checked while we are loading
591 * the DMA map. If the physical address of the segment
592 * exceeds the threshold, an error will be returned. The
593 * caller can then take whatever action is necessary to
594 * bounce the transfer. If this value is 0, it will be
595 * ignored.
597 bus_addr_t _bounce_thresh;
600 * The next value can be used to compensate for a constant
601 * displacement between the address space view of the CPU
602 * and the devices on the bus.
604 int32_t _displacement;
607 * DMA mapping methods.
609 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
610 bus_size_t, bus_size_t, int, bus_dmamap_t *);
611 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
612 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
613 bus_size_t, struct proc *, int);
614 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
615 struct mbuf *, int);
616 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
617 struct uio *, int);
618 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
619 bus_dma_segment_t *, int, bus_size_t, int);
620 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
621 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
622 bus_addr_t, bus_size_t, int);
625 #define bus_dmamap_create(t, s, n, m, b, f, p) \
626 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
627 #define bus_dmamap_destroy(t, p) \
628 (*(t)->_dmamap_destroy)((t), (p))
629 #define bus_dmamap_load(t, m, b, s, p, f) \
630 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
631 #define bus_dmamap_load_mbuf(t, m, b, f) \
632 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
633 #define bus_dmamap_load_uio(t, m, u, f) \
634 (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
635 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
636 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
637 #define bus_dmamap_unload(t, p) \
638 (*(t)->_dmamap_unload)((t), (p))
639 #define bus_dmamap_sync(t, p, o, l, ops) \
640 (void)((t)->_dmamap_sync ? \
641 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) : (void)0)
643 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
644 #define bus_dmatag_destroy(t)
647 * bus_dmamap_t
649 * Describes a DMA mapping.
651 struct atari_bus_dmamap {
653 * PRIVATE MEMBERS: not for use my machine-independent code.
655 bus_size_t _dm_size; /* largest DMA transfer mappable */
656 int _dm_segcnt; /* number of segs this map can map */
657 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
658 bus_size_t _dm_boundary; /* don't cross this */
659 bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */
660 int _dm_flags; /* misc. flags */
662 void *_dm_cookie; /* cookie for bus-specific funcs */
665 * PUBLIC MEMBERS: these are used by machine-independent code.
667 bus_size_t dm_maxsegsz; /* largest possible segment */
668 bus_size_t dm_mapsize; /* size of the mapping */
669 int dm_nsegs; /* # valid segments in mapping */
670 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
673 #ifdef _ATARI_BUS_DMA_PRIVATE
674 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
675 bus_size_t, int, bus_dmamap_t *);
676 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
677 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
678 bus_size_t, struct proc *, int);
679 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int);
680 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
681 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
682 bus_dma_segment_t *, int, bus_size_t, int);
683 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
684 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
685 bus_size_t, int);
686 #endif /* _ATARI_BUS_DMA_PRIVATE */
688 int bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
689 bus_size_t alignment, bus_size_t boundary,
690 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
691 int bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
692 bus_size_t alignment, bus_size_t boundary,
693 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
694 paddr_t low, paddr_t high);
695 void bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs);
696 int bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
697 int nsegs, size_t size, void **kvap, int flags);
698 void bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
699 paddr_t bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
700 int nsegs, off_t off, int prot, int flags);
702 #endif /* _ATARI_BUS_H_ */