sys/arch/cesfic/include/z8530var.h

   1 /* $NetBSD: z8530var.h,v 1.3 2007/11/07 15:56:12 ad Exp $ */
   2
   3 #include <dev/ic/z8530sc.h>
   4
   5 struct zsc_softc {
   6         device_t zsc_dev;               /* required first: base device */
   7         struct  zs_chanstate *zsc_cs[2];        /* channel A and B soft state */
   8         /* Machine-dependent part follows... */
   9         void    *zsc_softintr_cookie;
  10 };
  11
  12 uint8_t zs_read_reg(struct zs_chanstate *cs, uint8_t reg);
  13 uint8_t zs_read_csr(struct zs_chanstate *cs);
  14 uint8_t zs_read_data(struct zs_chanstate *cs);
  15
  16 void  zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val);
  17 void  zs_write_csr(struct zs_chanstate *cs, uint8_t val);
  18 void  zs_write_data(struct zs_chanstate *cs, uint8_t val);
  19
  20 /* Interrupt priority for the SCC chip; needs to match ZSHARD_PRI. */
  21 #define splzs()         spl4()
  22 #define IPL_ZS          IPL_HIGH
  23