sys/arch/dreamcast/include/bus.h

   1 /*      $NetBSD: bus.h,v 1.14 2008/04/28 20:23:16 martin Exp $  */
   2
   3 /*-
   4  * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   9  * NASA Ames Research Center.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30  * POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 /*
  34  * Copyright (c) 1996 Carnegie-Mellon University.
  35  * All rights reserved.
  36  *
  37  * Author: Chris G. Demetriou
  38  *
  39  * Permission to use, copy, modify and distribute this software and
  40  * its documentation is hereby granted, provided that both the copyright
  41  * notice and this permission notice appear in all copies of the
  42  * software, derivative works or modified versions, and any portions
  43  * thereof, and that both notices appear in supporting documentation.
  44  *
  45  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  46  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
  47  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  48  *
  49  * Carnegie Mellon requests users of this software to return to
  50  *
  51  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  52  *  School of Computer Science
  53  *  Carnegie Mellon University
  54  *  Pittsburgh PA 15213-3890
  55  *
  56  * any improvements or extensions that they make and grant Carnegie the
  57  * rights to redistribute these changes.
  58  */
  59
  60 #ifndef _DREAMCAST_BUS_H_
  61 #define _DREAMCAST_BUS_H_
  62
  63 #include <sys/types.h>
  64
  65 #ifdef _KERNEL
  66 /*
  67  * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled.
  68  */
  69 #if defined(DEBUG) && !defined(BUS_SPACE_DEBUG)
  70 #define BUS_SPACE_DEBUG
  71 #endif
  72
  73 #ifdef BUS_SPACE_DEBUG
  74 #include <sys/systm.h> /* for printf() prototype */
  75 /*
  76  * Macros for checking the aligned-ness of pointers passed to bus
  77  * space ops.  Strict alignment is required by the Alpha architecture,
  78  * and a trap will occur if unaligned access is performed.  These
  79  * may aid in the debugging of a broken device driver by displaying
  80  * useful information about the problem.
  81  */
  82 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t)                               \
  83         ((((u_long)(p)) & (sizeof(t)-1)) == 0)
  84
  85 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d)                             \
  86 ({                                                                      \
  87         if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) {                 \
  88                 printf("%s 0x%lx not aligned to %lu bytes %s:%d\n",     \
  89                     d, (u_long)(p), (u_long)sizeof(t), __FILE__, __LINE__);     \
  90         }                                                               \
  91         (void) 0;                                                       \
  92 })
  93
  94 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
  95 #else
  96 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d)     (void) 0
  97 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
  98 #endif /* BUS_SPACE_DEBUG */
  99 #endif /* _KERNEL */
 100
 101 /*
 102  * Addresses (in bus space).
 103  */
 104 typedef u_long bus_addr_t;
 105 typedef u_long bus_size_t;
 106
 107 /*
 108  * Access methods for bus space.
 109  */
 110 typedef struct dreamcast_bus_space *bus_space_tag_t;
 111 typedef u_long bus_space_handle_t;
 112
 113 struct dreamcast_bus_space {
 114         /* cookie */
 115         void            *dbs_cookie;
 116
 117         /* mapping/unmapping */
 118         int             (*dbs_map)(void *, bus_addr_t, bus_size_t,
 119                             int, bus_space_handle_t *);
 120         void            (*dbs_unmap)(void *, bus_space_handle_t,
 121                             bus_size_t);
 122         int             (*dbs_subregion)(void *, bus_space_handle_t,
 123                             bus_size_t, bus_size_t, bus_space_handle_t *);
 124         paddr_t         (*dbs_mmap)(void *, bus_addr_t, off_t, int, int);
 125
 126         /* allocation/deallocation */
 127         int             (*dbs_alloc)(void *, bus_addr_t, bus_addr_t,
 128                             bus_size_t, bus_size_t, bus_size_t, int,
 129                             bus_addr_t *, bus_space_handle_t *);
 130         void            (*dbs_free)(void *, bus_space_handle_t,
 131                             bus_size_t);
 132
 133         /* get kernel virtual address */
 134         void *          (*dbs_vaddr)(void *, bus_space_handle_t);
 135
 136         /* read (single) */
 137         uint8_t         (*dbs_r_1)(void *, bus_space_handle_t,
 138                             bus_size_t);
 139         uint16_t        (*dbs_r_2)(void *, bus_space_handle_t,
 140                             bus_size_t);
 141         uint32_t        (*dbs_r_4)(void *, bus_space_handle_t,
 142                             bus_size_t);
 143         uint64_t        (*dbs_r_8)(void *, bus_space_handle_t,
 144                             bus_size_t);
 145
 146         /* read multiple */
 147         void            (*dbs_rm_1)(void *, bus_space_handle_t,
 148                             bus_size_t, uint8_t *, bus_size_t);
 149         void            (*dbs_rm_2)(void *, bus_space_handle_t,
 150                             bus_size_t, uint16_t *, bus_size_t);
 151         void            (*dbs_rm_4)(void *, bus_space_handle_t,
 152                             bus_size_t, uint32_t *, bus_size_t);
 153         void            (*dbs_rm_8)(void *, bus_space_handle_t,
 154                             bus_size_t, uint64_t *, bus_size_t);
 155
 156         /* read region */
 157         void            (*dbs_rr_1)(void *, bus_space_handle_t,
 158                             bus_size_t, uint8_t *, bus_size_t);
 159         void            (*dbs_rr_2)(void *, bus_space_handle_t,
 160                             bus_size_t, uint16_t *, bus_size_t);
 161         void            (*dbs_rr_4)(void *, bus_space_handle_t,
 162                             bus_size_t, uint32_t *, bus_size_t);
 163         void            (*dbs_rr_8)(void *, bus_space_handle_t,
 164                             bus_size_t, uint64_t *, bus_size_t);
 165
 166         /* write (single) */
 167         void            (*dbs_w_1)(void *, bus_space_handle_t,
 168                             bus_size_t, uint8_t);
 169         void            (*dbs_w_2)(void *, bus_space_handle_t,
 170                             bus_size_t, uint16_t);
 171         void            (*dbs_w_4)(void *, bus_space_handle_t,
 172                             bus_size_t, uint32_t);
 173         void            (*dbs_w_8)(void *, bus_space_handle_t,
 174                             bus_size_t, uint64_t);
 175
 176         /* write multiple */
 177         void            (*dbs_wm_1)(void *, bus_space_handle_t,
 178                             bus_size_t, const uint8_t *, bus_size_t);
 179         void            (*dbs_wm_2)(void *, bus_space_handle_t,
 180                             bus_size_t, const uint16_t *, bus_size_t);
 181         void            (*dbs_wm_4)(void *, bus_space_handle_t,
 182                             bus_size_t, const uint32_t *, bus_size_t);
 183         void            (*dbs_wm_8)(void *, bus_space_handle_t,
 184                             bus_size_t, const uint64_t *, bus_size_t);
 185
 186         /* write region */
 187         void            (*dbs_wr_1)(void *, bus_space_handle_t,
 188                             bus_size_t, const uint8_t *, bus_size_t);
 189         void            (*dbs_wr_2)(void *, bus_space_handle_t,
 190                             bus_size_t, const uint16_t *, bus_size_t);
 191         void            (*dbs_wr_4)(void *, bus_space_handle_t,
 192                             bus_size_t, const uint32_t *, bus_size_t);
 193         void            (*dbs_wr_8)(void *, bus_space_handle_t,
 194                             bus_size_t, const uint64_t *, bus_size_t);
 195
 196         /* set multiple */
 197         void            (*dbs_sm_1)(void *, bus_space_handle_t,
 198                             bus_size_t, uint8_t, bus_size_t);
 199         void            (*dbs_sm_2)(void *, bus_space_handle_t,
 200                             bus_size_t, uint16_t, bus_size_t);
 201         void            (*dbs_sm_4)(void *, bus_space_handle_t,
 202                             bus_size_t, uint32_t, bus_size_t);
 203         void            (*dbs_sm_8)(void *, bus_space_handle_t,
 204                             bus_size_t, uint64_t, bus_size_t);
 205
 206         /* set region */
 207         void            (*dbs_sr_1)(void *, bus_space_handle_t,
 208                             bus_size_t, uint8_t, bus_size_t);
 209         void            (*dbs_sr_2)(void *, bus_space_handle_t,
 210                             bus_size_t, uint16_t, bus_size_t);
 211         void            (*dbs_sr_4)(void *, bus_space_handle_t,
 212                             bus_size_t, uint32_t, bus_size_t);
 213         void            (*dbs_sr_8)(void *, bus_space_handle_t,
 214                             bus_size_t, uint64_t, bus_size_t);
 215
 216         /* copy */
 217         void            (*dbs_c_1)(void *, bus_space_handle_t, bus_size_t,
 218                             bus_space_handle_t, bus_size_t, bus_size_t);
 219         void            (*dbs_c_2)(void *, bus_space_handle_t, bus_size_t,
 220                             bus_space_handle_t, bus_size_t, bus_size_t);
 221         void            (*dbs_c_4)(void *, bus_space_handle_t, bus_size_t,
 222                             bus_space_handle_t, bus_size_t, bus_size_t);
 223         void            (*dbs_c_8)(void *, bus_space_handle_t, bus_size_t,
 224                             bus_space_handle_t, bus_size_t, bus_size_t);
 225 };
 226
 227 #ifdef _KERNEL
 228 /*
 229  * Utility macros; INTERNAL USE ONLY.
 230  */
 231 #define __dbs_c(a,b)            __CONCAT(a,b)
 232 #define __dbs_opname(op,size)   __dbs_c(__dbs_c(__dbs_c(dbs_,op),_),size)
 233
 234 #define __dbs_rs(sz, tn, t, h, o)                                       \
 235         (__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"),         \
 236          (*(t)->__dbs_opname(r,sz))((t)->dbs_cookie, h, o))
 237
 238 #define __dbs_ws(sz, tn, t, h, o, v)                                    \
 239 do {                                                                    \
 240         __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");          \
 241         (*(t)->__dbs_opname(w,sz))((t)->dbs_cookie, h, o, v);           \
 242 } while (0)
 243
 244 #define __dbs_nonsingle(type, sz, tn, t, h, o, a, c)                    \
 245 do {                                                                    \
 246         __BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer");                  \
 247         __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");          \
 248         (*(t)->__dbs_opname(type,sz))((t)->dbs_cookie, h, o, a, c);     \
 249 } while (0)
 250
 251 #define __dbs_set(type, sz, tn, t, h, o, v, c)                          \
 252 do {                                                                    \
 253         __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr");          \
 254         (*(t)->__dbs_opname(type,sz))((t)->dbs_cookie, h, o, v, c);     \
 255 } while (0)
 256
 257 #define __dbs_copy(sz, tn, t, h1, o1, h2, o2, cnt)                      \
 258 do {                                                                    \
 259         __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1");      \
 260         __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2");      \
 261         (*(t)->__dbs_opname(c,sz))((t)->dbs_cookie, h1, o1, h2, o2, cnt); \
 262 } while (0)
 263
 264
 265 /*
 266  * Mapping and unmapping operations.
 267  */
 268 #define bus_space_map(t, a, s, f, hp)                                   \
 269         (*(t)->dbs_map)((t)->dbs_cookie, (a), (s), (f), (hp))
 270 #define bus_space_unmap(t, h, s)                                        \
 271         (*(t)->dbs_unmap)((t)->dbs_cookie, (h), (s))
 272 #define bus_space_subregion(t, h, o, s, hp)                             \
 273         (*(t)->dbs_subregion)((t)->dbs_cookie, (h), (o), (s), (hp))
 274 #define bus_space_mmap(t, a, o, p, f)                           \
 275         (*(t)->dbs_mmap)((t)->dbs_cookie, (a), (o), (p), (f))
 276
 277 #endif /* _KERNEL */
 278
 279 #define BUS_SPACE_MAP_CACHEABLE         0x01
 280 #define BUS_SPACE_MAP_LINEAR            0x02
 281 #define BUS_SPACE_MAP_PREFETCHABLE      0x04
 282
 283 #ifdef _KERNEL
 284 /*
 285  * Allocation and deallocation operations.
 286  */
 287 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp)                  \
 288         (*(t)->dbs_alloc)((t)->dbs_cookie, (rs), (re), (s), (a), (b),   \
 289             (f), (ap), (hp))
 290 #define bus_space_free(t, h, s)                                         \
 291         (*(t)->dbs_free)((t)->dbs_cookie, (h), (s))
 292
 293 /*
 294  * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
 295  */
 296 #define bus_space_vaddr(t, h) \
 297         (*(t)->dbs_vaddr)((t)->dbs_cookie, (h))
 298
 299 /*
 300  * Bus barrier operations.  The Dreamcast does not currently require
 301  * barriers, but we must provide the flags to MI code.
 302  */
 303 #define bus_space_barrier(t, h, o, l, f)                                \
 304         ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
 305
 306 #define BUS_SPACE_BARRIER_READ  0x01
 307 #define BUS_SPACE_BARRIER_WRITE 0x02
 308
 309
 310 /*
 311  * Bus read (single) operations.
 312  */
 313 #define bus_space_read_1(t, h, o)       __dbs_rs(1,uint8_t,(t),(h),(o))
 314 #define bus_space_read_2(t, h, o)       __dbs_rs(2,uint16_t,(t),(h),(o))
 315 #define bus_space_read_4(t, h, o)       __dbs_rs(4,uint32_t,(t),(h),(o))
 316 #define bus_space_read_8(t, h, o)       __dbs_rs(8,uint64_t,(t),(h),(o))
 317
 318
 319 /*
 320  * Bus read multiple operations.
 321  */
 322 #define bus_space_read_multi_1(t, h, o, a, c)                           \
 323         __dbs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c))
 324 #define bus_space_read_multi_2(t, h, o, a, c)                           \
 325         __dbs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c))
 326 #define bus_space_read_multi_4(t, h, o, a, c)                           \
 327         __dbs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
 328 #define bus_space_read_multi_8(t, h, o, a, c)                           \
 329         __dbs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))
 330
 331
 332 /*
 333  * Bus read region operations.
 334  */
 335 #define bus_space_read_region_1(t, h, o, a, c)                          \
 336         __dbs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c))
 337 #define bus_space_read_region_2(t, h, o, a, c)                          \
 338         __dbs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c))
 339 #define bus_space_read_region_4(t, h, o, a, c)                          \
 340         __dbs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
 341 #define bus_space_read_region_8(t, h, o, a, c)                          \
 342         __dbs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
 343
 344
 345 /*
 346  * Bus write (single) operations.
 347  */
 348 #define bus_space_write_1(t, h, o, v)   __dbs_ws(1,uint8_t,(t),(h),(o),(v))
 349 #define bus_space_write_2(t, h, o, v)   __dbs_ws(2,uint16_t,(t),(h),(o),(v))
 350 #define bus_space_write_4(t, h, o, v)   __dbs_ws(4,uint32_t,(t),(h),(o),(v))
 351 #define bus_space_write_8(t, h, o, v)   __dbs_ws(8,uint64_t,(t),(h),(o),(v))
 352
 353
 354 /*
 355  * Bus write multiple operations.
 356  */
 357 #define bus_space_write_multi_1(t, h, o, a, c)                          \
 358         __dbs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c))
 359 #define bus_space_write_multi_2(t, h, o, a, c)                          \
 360         __dbs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c))
 361 #define bus_space_write_multi_4(t, h, o, a, c)                          \
 362         __dbs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
 363 #define bus_space_write_multi_8(t, h, o, a, c)                          \
 364         __dbs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))
 365
 366
 367 /*
 368  * Bus write region operations.
 369  */
 370 #define bus_space_write_region_1(t, h, o, a, c)                         \
 371         __dbs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c))
 372 #define bus_space_write_region_2(t, h, o, a, c)                         \
 373         __dbs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c))
 374 #define bus_space_write_region_4(t, h, o, a, c)                         \
 375         __dbs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
 376 #define bus_space_write_region_8(t, h, o, a, c)                         \
 377         __dbs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))
 378
 379
 380 /*
 381  * Set multiple operations.
 382  */
 383 #define bus_space_set_multi_1(t, h, o, v, c)                            \
 384         __dbs_set(sm,1,uint8_t,(t),(h),(o),(v),(c))
 385 #define bus_space_set_multi_2(t, h, o, v, c)                            \
 386         __dbs_set(sm,2,uint16_t,(t),(h),(o),(v),(c))
 387 #define bus_space_set_multi_4(t, h, o, v, c)                            \
 388         __dbs_set(sm,4,uint32_t,(t),(h),(o),(v),(c))
 389 #define bus_space_set_multi_8(t, h, o, v, c)                            \
 390         __dbs_set(sm,8,uint64_t,(t),(h),(o),(v),(c))
 391
 392
 393 /*
 394  * Set region operations.
 395  */
 396 #define bus_space_set_region_1(t, h, o, v, c)                           \
 397         __dbs_set(sr,1,uint8_t,(t),(h),(o),(v),(c))
 398 #define bus_space_set_region_2(t, h, o, v, c)                           \
 399         __dbs_set(sr,2,uint16_t,(t),(h),(o),(v),(c))
 400 #define bus_space_set_region_4(t, h, o, v, c)                           \
 401         __dbs_set(sr,4,uint32_t,(t),(h),(o),(v),(c))
 402 #define bus_space_set_region_8(t, h, o, v, c)                           \
 403         __dbs_set(sr,8,uint64_t,(t),(h),(o),(v),(c))
 404
 405
 406 /*
 407  * Copy region operations.
 408  */
 409 #define bus_space_copy_region_1(t, h1, o1, h2, o2, c)                   \
 410         __dbs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c))
 411 #define bus_space_copy_region_2(t, h1, o1, h2, o2, c)                   \
 412         __dbs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c))
 413 #define bus_space_copy_region_4(t, h1, o1, h2, o2, c)                   \
 414         __dbs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c))
 415 #define bus_space_copy_region_8(t, h1, o1, h2, o2, c)                   \
 416         __dbs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
 417
 418 /*
 419  * Bus stream operations--defined in terms of non-stream counterparts
 420  */
 421 #define __BUS_SPACE_HAS_STREAM_METHODS 1
 422 #define bus_space_read_stream_1 bus_space_read_1
 423 #define bus_space_read_stream_2 bus_space_read_2
 424 #define bus_space_read_stream_4 bus_space_read_4
 425 #define bus_space_read_stream_8 bus_space_read_8
 426 #define bus_space_read_multi_stream_1 bus_space_read_multi_1
 427 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
 428 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
 429 #define bus_space_read_multi_stream_8 bus_space_read_multi_8
 430 #define bus_space_read_region_stream_1 bus_space_read_region_1
 431 #define bus_space_read_region_stream_2 bus_space_read_region_2
 432 #define bus_space_read_region_stream_4 bus_space_read_region_4
 433 #define bus_space_read_region_stream_8 bus_space_read_region_8
 434 #define bus_space_write_stream_1 bus_space_write_1
 435 #define bus_space_write_stream_2 bus_space_write_2
 436 #define bus_space_write_stream_4 bus_space_write_4
 437 #define bus_space_write_stream_8 bus_space_write_8
 438 #define bus_space_write_multi_stream_1 bus_space_write_multi_1
 439 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
 440 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
 441 #define bus_space_write_multi_stream_8 bus_space_write_multi_8
 442 #define bus_space_write_region_stream_1 bus_space_write_region_1
 443 #define bus_space_write_region_stream_2 bus_space_write_region_2
 444 #define bus_space_write_region_stream_4 bus_space_write_region_4
 445 #define bus_space_write_region_stream_8 bus_space_write_region_8
 446
 447 #endif /* _KERNEL */
 448
 449 /*
 450  * Flags used in various bus DMA methods.
 451  */
 452 #define BUS_DMA_WAITOK          0x000   /* safe to sleep (pseudo-flag) */
 453 #define BUS_DMA_NOWAIT          0x001   /* not safe to sleep */
 454 #define BUS_DMA_ALLOCNOW        0x002   /* perform resource allocation now */
 455 #define BUS_DMA_COHERENT        0x004   /* map memory to not require sync */
 456 #define BUS_DMA_STREAMING       0x008   /* hint: sequential, unidirectional */
 457 #define BUS_DMA_BUS1            0x010   /* placeholders for bus functions... */
 458 #define BUS_DMA_BUS2            0x020
 459 #define BUS_DMA_BUS3            0x040
 460 #define BUS_DMA_BUS4            0x080
 461 #define BUS_DMA_READ            0x100   /* mapping is device -> memory only */
 462 #define BUS_DMA_WRITE           0x200   /* mapping is memory -> device only */
 463 #define BUS_DMA_NOCACHE         0x400   /* hint: map non-cached memory */
 464
 465 /* Forwards needed by prototypes below. */
 466 struct mbuf;
 467 struct uio;
 468
 469 /*
 470  *      Operations performed by bus_dmamap_sync().
 471  */
 472 #define BUS_DMASYNC_PREREAD     0x01
 473 #define BUS_DMASYNC_POSTREAD    0x02
 474 #define BUS_DMASYNC_PREWRITE    0x04
 475 #define BUS_DMASYNC_POSTWRITE   0x08
 476
 477 typedef struct dreamcast_bus_dma_tag            *bus_dma_tag_t;
 478 typedef struct dreamcast_bus_dmamap             *bus_dmamap_t;
 479
 480 #define BUS_DMA_TAG_VALID(t)    ((t) != (bus_dma_tag_t)0)
 481
 482 /*
 483  *      bus_dma_segment_t
 484  *
 485  *      Describes a single contiguous DMA transaction.  Values
 486  *      are suitable for programming into DMA registers.
 487  */
 488 struct dreamcast_bus_dma_segment {
 489         bus_addr_t      ds_addr;        /* DMA address */
 490         bus_size_t      ds_len;         /* length of transfer */
 491 };
 492 typedef struct dreamcast_bus_dma_segment        bus_dma_segment_t;
 493
 494 /*
 495  *      bus_dma_tag_t
 496  *
 497  *      A machine-dependent opaque type describing the implementation of
 498  *      DMA for a given bus.
 499  */
 500
 501 struct dreamcast_bus_dma_tag {
 502         void    *_cookie;               /* cookie used in the guts */
 503
 504         /*
 505          * DMA mapping methods.
 506          */
 507         int     (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
 508                     bus_size_t, bus_size_t, int, bus_dmamap_t *);
 509         void    (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
 510         int     (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
 511                     bus_size_t, struct proc *, int);
 512         int     (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
 513                     struct mbuf *, int);
 514         int     (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
 515                     struct uio *, int);
 516         int     (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
 517                     bus_dma_segment_t *, int, bus_size_t, int);
 518         void    (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
 519         void    (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
 520                     bus_addr_t, bus_size_t, int);
 521
 522         /*
 523          * DMA memory utility functions.
 524          */
 525         int     (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
 526                     bus_size_t, bus_dma_segment_t *, int, int *, int);
 527         void    (*_dmamem_free)(bus_dma_tag_t,
 528                     bus_dma_segment_t *, int);
 529         int     (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
 530                     int, size_t, void **, int);
 531         void    (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
 532         paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
 533                     int, off_t, int, int);
 534 };
 535
 536 #define bus_dmamap_create(t, s, n, m, b, f, p)                  \
 537         (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
 538 #define bus_dmamap_destroy(t, p)                                \
 539         (*(t)->_dmamap_destroy)((t), (p))
 540 #define bus_dmamap_load(t, m, b, s, p, f)                       \
 541         (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
 542 #define bus_dmamap_load_mbuf(t, m, b, f)                        \
 543         (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
 544 #define bus_dmamap_load_uio(t, m, u, f)                         \
 545         (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
 546 #define bus_dmamap_load_raw(t, m, sg, n, s, f)                  \
 547         (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
 548 #define bus_dmamap_unload(t, p)                                 \
 549         (*(t)->_dmamap_unload)((t), (p))
 550 #define bus_dmamap_sync(t, m, o, l, op)                         \
 551         (void)((t)->_dmamap_sync ?                              \
 552             (*(t)->_dmamap_sync)((t), (m), (o), (l), (op)) : (void)0)
 553
 554 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f)               \
 555         (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
 556 #define bus_dmamem_free(t, sg, n)                               \
 557         (*(t)->_dmamem_free)((t), (sg), (n))
 558 #define bus_dmamem_map(t, sg, n, s, k, f)                       \
 559         (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
 560 #define bus_dmamem_unmap(t, k, s)                               \
 561         (*(t)->_dmamem_unmap)((t), (k), (s))
 562 #define bus_dmamem_mmap(t, sg, n, o, p, f)                      \
 563         (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
 564
 565 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
 566 #define bus_dmatag_destroy(t)
 567
 568 /*
 569  *      bus_dmamap_t
 570  *
 571  *      Describes a DMA mapping.
 572  */
 573 struct dreamcast_bus_dmamap {
 574         /*
 575          * PRIVATE MEMBERS: not for use my machine-independent code.
 576          */
 577         bus_size_t      _dm_size;       /* largest DMA transfer mappable */
 578         int             _dm_segcnt;     /* number of segs this map can map */
 579         bus_size_t      _dm_maxmaxsegsz; /* fixed largest possible segment */
 580         bus_size_t      _dm_boundary;   /* don't cross this */
 581         int             _dm_flags;      /* misc. flags */
 582
 583         void            *_dm_cookie;    /* cookie for bus-specific functions */
 584
 585         /*
 586          * PUBLIC MEMBERS: these are used by machine-independent code.
 587          */
 588         int             dm_nsegs;       /* # valid segments in mapping */
 589         bus_dma_segment_t dm_segs[1];   /* segments; variable length */
 590         bus_size_t      dm_mapsize;     /* size of the mapping */
 591         bus_size_t      dm_maxsegsz;    /* largest possible segment */
 592 };
 593
 594 #endif /* _DREAMCAST_BUS_H_ */