1 /* $NetBSD: becc_mainbus.c,v 1.1.2.3 2004/09/21 13:14:40 skrll Exp $ */
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
39 * ``Big Red Head'' front-end for the ADI Engineering Big Endian Companion
40 * Chip. We take care of setting up the BECC memory map, which is specific
41 * to the board the BECC is wired up to.
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: becc_mainbus.c,v 1.1.2.3 2004/09/21 13:14:40 skrll Exp $");
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/device.h>
51 #include <machine/autoconf.h>
52 #include <machine/bus.h>
54 #include <evbarm/adi_brh/brhreg.h>
55 #include <evbarm/adi_brh/brhvar.h>
57 #include <arm/xscale/beccreg.h>
58 #include <arm/xscale/beccvar.h>
60 #include <dev/pci/pcireg.h>
61 #include <dev/pci/pcidevs.h>
63 int becc_mainbus_match(struct device
*, struct cfdata
*, void *);
64 void becc_mainbus_attach(struct device
*, struct device
*, void *);
66 CFATTACH_DECL(becc_mainbus
, sizeof(struct becc_softc
),
67 becc_mainbus_match
, becc_mainbus_attach
, NULL
, NULL
);
69 /* There can be only one. */
70 int becc_mainbus_found
;
73 becc_mainbus_match(struct device
*parent
, struct cfdata
*cf
, void *aux
)
76 struct mainbus_attach_args
*ma
= aux
;
79 if (becc_mainbus_found
)
83 /* XXX Shoot arch/arm/mainbus in the head. */
86 if (strcmp(cf
->cf_name
, ma
->ma_name
) == 0)
94 becc_mainbus_attach(struct device
*parent
, struct device
*self
, void *aux
)
96 extern paddr_t physical_start
;
98 struct becc_softc
*sc
= (void *) self
;
100 becc_mainbus_found
= 1;
102 printf(": ADI Big Endian Companion Chip, rev. %s\n",
103 becc_revisions
[becc_rev
]);
106 * Virtual addresses for the PCI I/O, 2 PCI MEM, and
109 sc
->sc_pci_io_base
= BRH_PCI_IO_VBASE
;
110 sc
->sc_pci_mem_base
[0] = BRH_PCI_MEM1_VBASE
;
111 sc
->sc_pci_mem_base
[1] = BRH_PCI_MEM2_VBASE
;
112 sc
->sc_pci_cfg_base
= BRH_PCI_CONF_VBASE
;
115 * Ver <= 7: There are 2 32M inbound PCI memory windows. Direct-
116 * map them to the first 64M of SDRAM. We have limited SDRAM to
117 * 64M during bootstrap in this case.
119 * Ver >= 8: There is a 128M inbound PCI memory window which can
120 * cover all of SDRAM, which we obviously prefer to use.
122 * We map PCI:SDRAM 1:1, placing the two smaller windows after
123 * after the larger one.
125 sc
->sc_iwin
[0].iwin_base
= physical_start
+ 128 * 1024 * 1024;
126 sc
->sc_iwin
[0].iwin_xlate
= physical_start
;
127 sc
->sc_iwin
[1].iwin_base
= sc
->sc_iwin
[0].iwin_base
+BECC_PCI_MEM1_SIZE
;
128 sc
->sc_iwin
[1].iwin_xlate
= physical_start
+ BECC_PCI_MEM1_SIZE
;
129 sc
->sc_iwin
[2].iwin_base
= physical_start
;
130 sc
->sc_iwin
[2].iwin_xlate
= physical_start
;
133 * Ver <= 8: There are 2 32M outbound PCI memory windows.
134 * Ver >= 9: There are 3 32M outbound PCI memory windows.
136 * One of these may be byte swapped. We don't use the third
137 * one available on >= Ver9.
139 sc
->sc_owin_xlate
[0] = 32U * 1024 * 1024;
140 sc
->sc_owin_xlate
[1] = 32U * 1024 * 1024;
141 sc
->sc_owin_xlate
[2] = 32U * 1024 * 1024;
144 * Map the 1M PCI I/O window to PCI I/O address 0.
146 sc
->sc_ioout_xlate
= 0;
149 * No platform-specific PCI interrupt routing; it's all done