sys/arch/evbarm/ifpga/ifpga_pci.c

   1 /*      $NetBSD: ifpga_pci.c,v 1.12 2005/12/11 12:17:09 christos Exp $  */
   2
   3 /*
   4  * Copyright (c) 2001 ARM Ltd
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The name of the company may not be used to endorse or promote
  16  *    products derived from this software without specific prior written
  17  *    permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  * Copyright (c) 1997,1998 Mark Brinicombe.
  32  * Copyright (c) 1997,1998 Causality Limited
  33  * All rights reserved.
  34  *
  35  * Redistribution and use in source and binary forms, with or without
  36  * modification, are permitted provided that the following conditions
  37  * are met:
  38  * 1. Redistributions of source code must retain the above copyright
  39  *    notice, this list of conditions and the following disclaimer.
  40  * 2. Redistributions in binary form must reproduce the above copyright
  41  *    notice, this list of conditions and the following disclaimer in the
  42  *    documentation and/or other materials provided with the distribution.
  43  * 3. All advertising materials mentioning features or use of this software
  44  *    must display the following acknowledgement:
  45  *      This product includes software developed by Mark Brinicombe
  46  *      for the NetBSD Project.
  47  * 4. The name of the company nor the name of the author may be used to
  48  *    endorse or promote products derived from this software without specific
  49  *    prior written permission.
  50  *
  51  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  52  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  53  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  54  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  55  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  56  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  57  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  58  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  59  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  60  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  61  * SUCH DAMAGE.
  62  */
  63
  64 #define _ARM32_BUS_DMA_PRIVATE
  65
  66 #include <sys/cdefs.h>
  67 __KERNEL_RCSID(0, "$NetBSD: ifpga_pci.c,v 1.12 2005/12/11 12:17:09 christos Exp $");
  68
  69 #include <sys/param.h>
  70 #include <sys/systm.h>
  71 #include <sys/conf.h>
  72 #include <sys/malloc.h>
  73 #include <sys/device.h>
  74
  75 #include <evbarm/integrator/int_bus_dma.h>
  76
  77 #include <machine/intr.h>
  78
  79 #include <dev/pci/pcireg.h>
  80 #include <dev/pci/pcivar.h>
  81
  82 #include <evbarm/ifpga/ifpgareg.h>
  83 #include <evbarm/ifpga/ifpgamem.h>
  84 #include <evbarm/ifpga/ifpga_pcivar.h>
  85 #include <evbarm/dev/v360reg.h>
  86
  87
  88 void            ifpga_pci_attach_hook (device_t, device_t,
  89                     struct pcibus_attach_args *);
  90 int             ifpga_pci_bus_maxdevs (void *, int);
  91 pcitag_t        ifpga_pci_make_tag (void *, int, int, int);
  92 void            ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *,
  93                     int *);
  94 pcireg_t        ifpga_pci_conf_read (void *, pcitag_t, int);
  95 void            ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t);
  96 int             ifpga_pci_intr_map (struct pci_attach_args *,
  97                     pci_intr_handle_t *);
  98 const char      *ifpga_pci_intr_string (void *, pci_intr_handle_t);
  99 const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t);
 100 void            *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int,
 101                     int (*)(void *), void *);
 102 void            ifpga_pci_intr_disestablish (void *, void *);
 103
 104 struct arm32_pci_chipset ifpga_pci_chipset = {
 105         NULL,   /* conf_v */
 106         ifpga_pci_attach_hook,
 107         ifpga_pci_bus_maxdevs,
 108         ifpga_pci_make_tag,
 109         ifpga_pci_decompose_tag,
 110         ifpga_pci_conf_read,
 111         ifpga_pci_conf_write,
 112         NULL,   /* intr_v */
 113         ifpga_pci_intr_map,
 114         ifpga_pci_intr_string,
 115         ifpga_pci_intr_evcnt,
 116         ifpga_pci_intr_establish,
 117         ifpga_pci_intr_disestablish
 118 };
 119
 120 /*
 121  * Use the integrator-specific bus_dma routines.
 122  */
 123 struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = {
 124         0,
 125         0,
 126         NULL,
 127         _bus_dmamap_create,
 128         _bus_dmamap_destroy,
 129         _bus_dmamap_load,
 130         _bus_dmamap_load_mbuf,
 131         _bus_dmamap_load_uio,
 132         _bus_dmamap_load_raw,
 133         _bus_dmamap_unload,
 134         _bus_dmamap_sync,       /* pre */
 135         NULL,                   /* post */
 136         _bus_dmamem_alloc,
 137         _bus_dmamem_free,
 138         _bus_dmamem_map,
 139         _bus_dmamem_unmap,
 140         _bus_dmamem_mmap,
 141 };
 142
 143 /*
 144  * Currently we only support 12 devices as we select directly in the
 145  * type 0 config cycle
 146  * (See conf_{read,write} for more detail
 147  */
 148 #define MAX_PCI_DEVICES 21
 149
 150 /*static int
 151 pci_intr(void *arg)
 152 {
 153         printf("pci int %x\n", (int)arg);
 154         return 0;
 155 }*/
 156
 157
 158 void
 159 ifpga_pci_attach_hook(device_t parent, device_t self,
 160     struct pcibus_attach_args *pba)
 161 {
 162 #ifdef PCI_DEBUG
 163         printf("ifpga_pci_attach_hook()\n");
 164 #endif
 165 }
 166
 167 int
 168 ifpga_pci_bus_maxdevs(void *pcv, int busno)
 169 {
 170 #ifdef PCI_DEBUG
 171         printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno);
 172 #endif
 173         return MAX_PCI_DEVICES;
 174 }
 175
 176 pcitag_t
 177 ifpga_pci_make_tag(void *pcv, int bus, int device, int function)
 178 {
 179 #ifdef PCI_DEBUG
 180         printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n",
 181             pcv, bus, device, function);
 182 #endif
 183         return (bus << 16) | (device << 11) | (function << 8);
 184 }
 185
 186 void
 187 ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep,
 188     int *functionp)
 189 {
 190 #ifdef PCI_DEBUG
 191         printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, "
 192             "fp=%p)\n", pcv, tag, busp, devicep, functionp);
 193 #endif
 194
 195         if (busp != NULL)
 196                 *busp = (tag >> 16) & 0xff;
 197         if (devicep != NULL)
 198                 *devicep = (tag >> 11) & 0x1f;
 199         if (functionp != NULL)
 200                 *functionp = (tag >> 8) & 0x7;
 201 }
 202
 203 pcireg_t
 204 ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg)
 205 {
 206         pcireg_t data;
 207         struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
 208         int bus, device, function;
 209         u_int address;
 210
 211         ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
 212
 213         /* Reset the appertures so that we can talk to the register space.  */
 214         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
 215             IFPGA_PCI_APP0_512MB_BASE);
 216         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
 217             IFPGA_PCI_APP1_CONF_BASE);
 218
 219         if (bus == 0) {
 220                 address = (1 << (device + 11)) | reg;
 221                 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 222                     IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
 223
 224                 /* Read the value from the bus...  */
 225                 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
 226                     address & 0x00ffffff);
 227
 228         } else {
 229                 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 230                     IFPGA_PCI_APP1_CONF_T1_MAP);
 231
 232                 /* Read the value from the bus... */
 233                 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
 234                     tag | reg);
 235         }
 236         /* ... and put the memory spaces back again.  */
 237
 238         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
 239             IFPGA_PCI_APP1_256MB_BASE);
 240         bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 241             IFPGA_PCI_APP1_256MB_MAP);
 242         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
 243             IFPGA_PCI_APP0_256MB_BASE);
 244 #ifdef PCI_DEBUG
 245         printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n",
 246             pcv, tag, reg, data);
 247 #endif
 248         return data;
 249 }
 250
 251 void
 252 ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data)
 253 {
 254         struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
 255         int bus, device, function;
 256         u_int address;
 257
 258 #ifdef PCI_DEBUG
 259         printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n",
 260             pcv, tag, reg, data);
 261 #endif
 262
 263         ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
 264
 265         /* Reset the appertures so that we can talk to the register space.  */
 266         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
 267             IFPGA_PCI_APP0_512MB_BASE);
 268         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
 269             IFPGA_PCI_APP1_CONF_BASE);
 270
 271         if (bus == 0) {
 272                 address = (1 << (device + 11)) | reg;
 273                 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 274                     IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
 275
 276                 /* Write the value to the bus...  */
 277                 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh,
 278                     address & 0x00ffffff, data);
 279
 280         } else {
 281                 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 282                     IFPGA_PCI_APP1_CONF_T1_MAP);
 283
 284                 /* Write the value to the bus... */
 285                 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg,
 286                     data);
 287         }
 288         /* ... and put the memory spaces back again.  */
 289
 290         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
 291             IFPGA_PCI_APP1_256MB_BASE);
 292         bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
 293             IFPGA_PCI_APP1_256MB_MAP);
 294         bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
 295             IFPGA_PCI_APP0_256MB_BASE);
 296 }
 297
 298 int
 299 ifpga_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
 300 {
 301         int line = pa->pa_intrline;
 302
 303 #ifdef PCI_DEBUG
 304         int pin = pa->pa_intrpin;
 305         void *pcv = pa->pa_pc;
 306         pcitag_t intrtag = pa->pa_intrtag;
 307         int bus, device, function;
 308
 309         ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function);
 310         printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d "
 311             "dev=%d\n", pcv, intrtag, pin, line, device);
 312 #endif
 313
 314
 315 #ifdef PCI_DEBUG
 316         printf("pin %d, line %d mapped to int %d\n", pin, line, line);
 317 #endif
 318
 319         *ihp = line;
 320         return 0;
 321 }
 322
 323 const char *
 324 ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih)
 325 {
 326         static char irqstr[12];         /* 6 + 1 + NULL + sanity */
 327
 328 #ifdef PCI_DEBUG
 329         printf("ifpga_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih);
 330 #endif
 331         if (ih == 0)
 332                 panic("ifpga_pci_intr_string: bogus handle 0x%lx", ih);
 333
 334         sprintf(irqstr, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0);
 335         return irqstr;
 336 }
 337
 338 const struct evcnt *
 339 ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih)
 340 {
 341
 342         /* XXX for now, no evcnt parent reported */
 343         return NULL;
 344 }
 345
 346 void *
 347 ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level,
 348     int (*func) (void *), void *arg)
 349 {
 350         void *intr;
 351         int length;
 352
 353 #ifdef PCI_DEBUG
 354         printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, "
 355             "func=%p, arg=%p)\n", pcv, ih, level, func, arg);
 356 #endif
 357
 358         /* Copy the interrupt string to a private buffer */
 359         length = strlen(ifpga_pci_intr_string(pcv, ih));
 360         intr = ifpga_intr_establish(ih, level, func, arg);
 361
 362         return intr;
 363 }
 364
 365 void
 366 ifpga_pci_intr_disestablish(void *pcv, void *cookie)
 367 {
 368 #ifdef PCI_DEBUG
 369         printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n",
 370             pcv, cookie);
 371 #endif
 372         /* XXXX Need to free the string */
 373
 374         ifpga_intr_disestablish(cookie);
 375 }