sys/arch/evbarm/iq80310/i80312_mainbus.c

   1 /*      $NetBSD: i80312_mainbus.c,v 1.10.6.3 2004/09/21 13:14:48 skrll Exp $    */
   2
   3 /*
   4  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed for the NetBSD Project by
  20  *      Wasabi Systems, Inc.
  21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
  22  *    or promote products derived from this software without specific prior
  23  *    written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 /*
  39  * IQ80310 front-end for the i80312 Companion I/O chip.  We take care
  40  * of setting up the i80312 memory map, PCI interrupt routing, etc.,
  41  * which are all specific to the board the i80312 is wired up to.
  42  */
  43
  44 #include <sys/cdefs.h>
  45 __KERNEL_RCSID(0, "$NetBSD: i80312_mainbus.c,v 1.10.6.3 2004/09/21 13:14:48 skrll Exp $");
  46
  47 #include <sys/param.h>
  48 #include <sys/systm.h>
  49 #include <sys/device.h>
  50
  51 #include <machine/autoconf.h>
  52 #include <machine/bus.h>
  53
  54 #include <evbarm/iq80310/iq80310reg.h>
  55 #include <evbarm/iq80310/iq80310var.h>
  56
  57 #include <arm/xscale/i80312reg.h>
  58 #include <arm/xscale/i80312var.h>
  59
  60 #include <dev/pci/pcireg.h>
  61 #include <dev/pci/pcidevs.h>
  62
  63 int     i80312_mainbus_match(struct device *, struct cfdata *, void *);
  64 void    i80312_mainbus_attach(struct device *, struct device *, void *);
  65
  66 CFATTACH_DECL(iopxs_mainbus, sizeof(struct i80312_softc),
  67     i80312_mainbus_match, i80312_mainbus_attach, NULL, NULL);
  68
  69 /* There can be only one. */
  70 int     i80312_mainbus_found;
  71
  72 int
  73 i80312_mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
  74 {
  75 #if 0
  76         struct mainbus_attach_args *ma = aux;
  77 #endif
  78
  79         if (i80312_mainbus_found)
  80                 return (0);
  81
  82 #if 1
  83         /* XXX Shoot arch/arm/mainbus in the head. */
  84         return (1);
  85 #else
  86         if (strcmp(cf->cf_name, ma->ma_name) == 0)
  87                 return (1);
  88
  89         return (0);
  90 #endif
  91 }
  92
  93 void
  94 i80312_mainbus_attach(struct device *parent, struct device *self, void *aux)
  95 {
  96         struct i80312_softc *sc = (void *) self;
  97         paddr_t memstart;
  98         psize_t memsize;
  99
 100         i80312_mainbus_found = 1;
 101
 102         /*
 103          * Fill in the space tag for the i80312's own devices,
 104          * and hand-craft the space handle for it (the device
 105          * was mapped during early bootstrap).
 106          */
 107         i80312_bs_init(&i80312_bs_tag, sc);
 108         sc->sc_st = &i80312_bs_tag;
 109         sc->sc_sh = IQ80310_80312_VBASE;
 110
 111         /*
 112          * Slice off a subregion for the Memory Controller -- we need it
 113          * here in order read the memory size.
 114          */
 115         if (bus_space_subregion(sc->sc_st, sc->sc_sh, I80312_MEM_BASE,
 116             I80312_MEM_SIZE, &sc->sc_mem_sh))
 117                 panic("%s: unable to subregion MEM registers",
 118                     sc->sc_dev.dv_xname);
 119
 120         /*
 121          * We have mapped the PCI I/O windows in the early bootstrap phase.
 122          */
 123         sc->sc_piow_vaddr = IQ80310_PIOW_VBASE;
 124         sc->sc_siow_vaddr = IQ80310_SIOW_VBASE;
 125
 126         /* Some boards are always considered "host". */
 127 #if defined(IOP310_TEAMASA_NPWR)
 128         sc->sc_is_host = 1;
 129 #else /* Default to stock IQ80310 */
 130         sc->sc_is_host = CPLD_READ(IQ80310_BACKPLANE_DET) & 1;
 131
 132         /*
 133          * Set the subsystem vendor/device IDs to "Cyclone" "PCI-700",
 134          * which is the board-specific identification.
 135          */
 136         bus_space_write_4(sc->sc_st, sc->sc_sh,
 137             I80312_ATU_BASE + PCI_SUBSYS_ID_REG,
 138             PCI_ID_CODE(PCI_VENDOR_CYCLONE, PCI_PRODUCT_CYCLONE_PCI_700));
 139 #endif
 140
 141         printf(": i80312 Companion I/O, acting as PCI %s\n",
 142             sc->sc_is_host ? "host" : "slave");
 143
 144         i80312_sdram_bounds(sc->sc_st, sc->sc_mem_sh, &memstart, &memsize);
 145
 146         /*
 147          * Set the Primary Inbound window xlate base to the start
 148          * of RAM.  Set the size to 4K, for now.  Just for testing
 149          * in a host.  This obviously has to be customized for each
 150          * IQ310 application.
 151          *
 152          * Note the first 4K of the window is reserved for the
 153          * messaging unit, so no RAM is going to be accessed here.
 154          *
 155          * ..unless we're a host -- in which case, make it work like
 156          * the Secondary Inbound window (below).
 157          */
 158         if (sc->sc_is_host) {
 159                 sc->sc_pin_base = memstart;
 160                 sc->sc_pin_xlate = memstart;
 161                 sc->sc_pin_size = memsize;
 162         } else {
 163                 sc->sc_pin_xlate = memstart;
 164                 sc->sc_pin_size = 4096;
 165         }
 166
 167         /*
 168          * Map the Secondary Inbound window 1:1 with local RAM.
 169          */
 170         sc->sc_sin_base = memstart;
 171         sc->sc_sin_xlate = memstart;
 172         sc->sc_sin_size = memsize;
 173
 174         /*
 175          * XXX Don't use the Primary Outbound windows, for now.
 176          */
 177         sc->sc_pmemout_size = 0;
 178         sc->sc_pioout_size = 0;
 179
 180         /*
 181          * Set the Secondary Outbound Memory window to map 1:1
 182          * PCI:Local.
 183          */
 184         sc->sc_smemout_base = I80312_PCI_XLATE_SMW_BASE;
 185         sc->sc_smemout_size = I80312_PCI_XLATE_MSIZE;
 186
 187         /*
 188          * Set the Secondary Outbound I/O window to map
 189          * to PCI address 0 for all 64K of the I/O space.
 190          */
 191         sc->sc_sioout_base = 0;
 192         sc->sc_sioout_size = I80312_PCI_XLATE_IOSIZE;
 193
 194         /*
 195          * XXX For now, suppress all secondary IDSELs (thus making all
 196          * devices from S_AD[11]..S_AD[25] private).
 197          */
 198         sc->sc_sisr = 0x3ff;
 199
 200         /*
 201          * XXX For now, make the entire Secondary Outbound address
 202          * spaces private.
 203          */
 204         sc->sc_privio_base = sc->sc_sioout_base;
 205         sc->sc_privio_size = sc->sc_sioout_size;
 206         sc->sc_privmem_base = sc->sc_smemout_base;
 207         sc->sc_privmem_size = sc->sc_smemout_size;
 208
 209         /*
 210          * Initialize the interrupt part of our PCI chipset tag.
 211          */
 212         iq80310_pci_init(&sc->sc_pci_chipset, sc);
 213
 214         i80312_attach(sc);
 215 }