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[netbsd-mini2440.git] / sys / arch / evbarm / lubbock / obio.c
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1 /* $NetBSD: obio.c,v 1.8 2008/04/27 18:58:46 matt Exp $ */
3 /*
4 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of Genetec Corporation may not be used to endorse or
16 * promote products derived from this software without specific prior
17 * written permission.
19 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * TODO: dispatch interrupt to SOFTSERIAL or SOFTNET according to requested
34 * interrupt level.
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.8 2008/04/27 18:58:46 matt Exp $");
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43 #include <sys/kernel.h>
44 #include <sys/reboot.h>
46 #include <machine/cpu.h>
47 #include <machine/bus.h>
48 #include <machine/intr.h>
49 #include <arm/cpufunc.h>
51 #include <arm/mainbus/mainbus.h>
52 #include <arm/xscale/pxa2x0reg.h>
53 #include <arm/xscale/pxa2x0var.h>
54 #include <arm/xscale/pxa2x0_gpio.h>
55 #include <arm/sa11x0/sa11x0_var.h>
56 #include <evbarm/lubbock/lubbock_reg.h>
57 #include <evbarm/lubbock/lubbock_var.h>
59 #include "locators.h"
61 /* prototypes */
62 static int obio_match(device_t, cfdata_t, void *);
63 static void obio_attach(device_t, device_t, void *);
64 static int obio_search(device_t, cfdata_t, const int *, void *);
65 static int obio_print(void *, const char *);
67 /* attach structures */
68 CFATTACH_DECL_NEW(obio, sizeof(struct obio_softc), obio_match, obio_attach,
69 NULL, NULL);
71 uint32_t obio_intr_mask;
73 static int
74 obio_spurious(void *arg)
76 int irqno = (int)arg;
78 aprint_normal("Spurious interrupt %d on On-board peripheral", irqno);
79 return 1;
84 * interrupt handler for GPIO0 (on-board peripherals)
86 * On Lubbock, 8 interrupts are ORed through on-board logic,
87 * and routed to GPIO0 of PXA250 processor.
89 static int
90 obio_intr(void *arg)
92 int irqno, pending, mask;
93 struct obio_softc *sc = (struct obio_softc *)arg;
94 int psw;
96 mask = sc->sc_obio_intr_mask; /* real irq mask for obio */
98 psw = disable_interrupts(I32_bit|F32_bit);
99 pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
100 LUBBOCK_INTRCTL);
101 /* Here is a chance to lose some interrupts.
102 * You need to modify FPGA program to avoid it
104 bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRCTL, 0);
105 restore_interrupts(psw);
108 pending &= mask;
109 while (pending) {
110 irqno = 0;
112 for ( ;pending; ++irqno) {
113 if (0 == (pending & (1U<<irqno)))
114 continue;
115 pending &= ~(1U<<irqno);
117 #ifdef notyet
118 /* if ipl of this irq is higher than current spl level,
119 call the handler directly instead of dispatching it to
120 software interrupt. */
121 if (sc->sc_handler[irqno].level > curcpl()) {
122 (* sc->sc_handler[irqno].func)(
123 sc->sc_handler[irqno].arg );
125 else
126 #endif
128 /* mask this interrupt until software
129 interrupt is handled. */
130 sc->sc_obio_intr_pending |= (1U<<irqno);
131 mask &= ~(1U<<irqno);
132 bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
133 LUBBOCK_INTRMASK, mask);
135 /* handle it later */
136 softint_schedule(sc->sc_si);
140 psw = disable_interrupts(I32_bit|F32_bit);
141 pending = bus_space_read_2(sc->sc_iot, sc->sc_obioreg_ioh,
142 LUBBOCK_INTRCTL);
143 bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh,
144 LUBBOCK_INTRCTL,0);
145 restore_interrupts(psw);
146 pending &= mask;
149 /* GPIO interrupt is edge triggered. make a pulse
150 to let Cotulla notice when other interrupts are
151 still pending */
152 bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, 0);
153 bus_space_write_2(sc->sc_iot, sc->sc_obioreg_ioh, LUBBOCK_INTRMASK, mask);
154 return 1;
157 static void
158 obio_softintr(void *arg)
160 struct obio_softc *sc = (struct obio_softc *)arg;
161 int irqno;
162 int psw;
163 int spl_save = curcpl();
165 psw = disable_interrupts(I32_bit);
166 while ((irqno = find_first_bit(sc->sc_obio_intr_pending)) >= 0) {
167 sc->sc_obio_intr_pending &= ~(1U<<irqno);
169 restore_interrupts(psw);
171 _splraise(sc->sc_handler[irqno].level);
172 (* sc->sc_handler[irqno].func)(
173 sc->sc_handler[irqno].arg);
174 splx(spl_save);
176 psw = disable_interrupts(I32_bit);
179 bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
180 LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
182 restore_interrupts(psw);
186 * int obio_print(void *aux, const char *name)
187 * print configuration info for children
190 static int
191 obio_print(void *aux, const char *name)
193 struct obio_attach_args *oba = (struct obio_attach_args*)aux;
195 if (oba->oba_addr != OBIOCF_ADDR_DEFAULT)
196 aprint_normal(" addr 0x%lx", oba->oba_addr);
197 if (oba->oba_intr > 0)
198 aprint_normal(" intr %d", oba->oba_intr);
199 return (UNCONF);
203 obio_match(device_t parent, cfdata_t match, void *aux)
205 return 1;
208 void
209 obio_attach(device_t parent, device_t self, void *aux)
211 struct obio_softc *sc = device_private(self);
212 int system_id, baseboard_id, expansion_id, processor_card_id;
213 struct pxaip_attach_args *sa = (struct pxaip_attach_args *)aux;
214 const char *processor_card_name;
215 int i;
218 /* Map on-board FPGA registers */
219 sc->sc_dev = self;
220 sc->sc_iot = &pxa2x0_bs_tag;
221 if (bus_space_map(sc->sc_iot, LUBBOCK_OBIO_PBASE, LUBBOCK_OBIO_SIZE,
222 0, &(sc->sc_obioreg_ioh))) {
223 aprint_normal_dev(self, "can't map FPGA registers\n");
226 system_id = bus_space_read_4(sc->sc_iot, sc->sc_obioreg_ioh,
227 LUBBOCK_SYSTEMID);
229 baseboard_id = (system_id>>8) & 0x0f;
230 expansion_id = (system_id>>4) & 0x0f;
231 processor_card_id = system_id & 0x0f;
233 switch (processor_card_id) {
234 case 0: processor_card_name = "Cotulla"; break;
235 case 1: processor_card_name = "Sabinal"; break;
236 default: processor_card_name = "(unknown)";
239 printf(" : baseboard=%d (%s), expansion card=%d, processor card=%d (%s)\n",
240 baseboard_id,
241 baseboard_id==8 ? "DBPXA250(lubbock)" : "(unknown)",
242 expansion_id,
243 processor_card_id, processor_card_name );
246 * Mask all interrupts.
247 * They are later unmasked at each device's attach routine.
249 bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
250 LUBBOCK_INTRMASK,0);
252 sc->sc_intr = sa->pxa_intr; /* irq no. on ICU. */
253 sc->sc_obio_intr_mask = 0; /* No interrupt used */
254 sc->sc_obio_intr_pending = 0;
255 sc->sc_ipl = IPL_BIO;
257 for (i=0; i < N_OBIO_IRQ; ++i) {
258 sc->sc_handler[i].func = obio_spurious;
259 sc->sc_handler[i].arg = (void *)i;
264 * establish interrupt handler.
266 #if 0
268 * level is lowest at first, and changed when
269 * sub-interrupt handlers are established
271 sc->sc_ipl = IPL_BIO;
272 #else
274 * level is very high to allow high priority sub-interrupts.
276 sc->sc_ipl = IPL_AUDIO;
277 #endif
278 sc->sc_ih = pxa2x0_gpio_intr_establish(0, IST_EDGE_FALLING, sc->sc_ipl,
279 obio_intr, sc);
280 sc->sc_si = softint_establish(SOFTINT_NET, obio_softintr, sc);
284 * Attach each devices
286 config_search_ia(obio_search, self, "obio", NULL);
290 obio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
292 struct obio_softc *sc = device_private(parent);
293 struct obio_attach_args oba;
295 oba.oba_sc = sc;
296 oba.oba_iot = sc->sc_iot;
297 oba.oba_addr = cf->cf_loc[OBIOCF_ADDR];
298 oba.oba_intr = cf->cf_loc[OBIOCF_INTR];
300 if (config_match(parent, cf, &oba))
301 config_attach(parent, cf, &oba, obio_print);
303 return 0;
306 void *
307 obio_intr_establish(struct obio_softc *sc,
308 int irq, int ipl, int (*func)(void *), void *arg)
310 int psw;
312 if (irq < 0 || N_OBIO_IRQ <= irq)
313 panic("Bad irq no for obio");
315 psw = disable_interrupts(I32_bit);
317 sc->sc_handler[irq].func = func;
318 sc->sc_handler[irq].arg = arg;
319 sc->sc_handler[irq].level = ipl;
321 #ifdef notyet
322 if (ipl > sc->sc_ipl) {
323 pxa2x0_update_intr_masks(sc->sc_intr, ipl);
324 sc->sc_ipl = ipl;
326 #endif
328 sc->sc_obio_intr_mask |= (1U << irq);
329 bus_space_write_4(sc->sc_iot, sc->sc_obioreg_ioh,
330 LUBBOCK_INTRMASK, sc->sc_obio_intr_mask);
332 enable_interrupts(psw);
333 return &sc->sc_handler[irq];