4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003, 2005 Genetec Corporation
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of The Fujitsu Component Limited nor the name of
17 * Genetec corporation may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * Copyright (c) 2001,2002 ARM Ltd
36 * All rights reserved.
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. The name of the company may not be used to endorse or promote
47 * products derived from this software without specific prior written
50 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND
51 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
52 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
53 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD
54 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
60 * POSSIBILITY OF SUCH DAMAGE.
65 * Copyright (c) 1997,1998 Mark Brinicombe.
66 * Copyright (c) 1997,1998 Causality Limited.
67 * All rights reserved.
69 * Redistribution and use in source and binary forms, with or without
70 * modification, are permitted provided that the following conditions
72 * 1. Redistributions of source code must retain the above copyright
73 * notice, this list of conditions and the following disclaimer.
74 * 2. Redistributions in binary form must reproduce the above copyright
75 * notice, this list of conditions and the following disclaimer in the
76 * documentation and/or other materials provided with the distribution.
77 * 3. All advertising materials mentioning features or use of this software
78 * must display the following acknowledgement:
79 * This product includes software developed by Mark Brinicombe
80 * for the NetBSD Project.
81 * 4. The name of the company nor the name of the author may be used to
82 * endorse or promote products derived from this software without specific
83 * prior written permission.
85 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
86 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
87 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
88 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
89 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
90 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
91 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
92 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
93 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
94 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
97 * Machine dependant functions for kernel setup for integrator board
103 * Machine dependant functions for kernel setup for Samsung SMDK2410
104 * derived from integrator_machdep.c
107 #include <sys/cdefs.h>
108 __KERNEL_RCSID(0, "$NetBSD$");
111 #include "opt_kgdb.h"
112 #include "opt_pmap_debug.h"
115 #include <sys/param.h>
116 #include <sys/device.h>
117 #include <sys/systm.h>
118 #include <sys/kernel.h>
119 #include <sys/exec.h>
120 #include <sys/proc.h>
121 #include <sys/msgbuf.h>
122 #include <sys/reboot.h>
123 #include <sys/termios.h>
124 #include <sys/ksyms.h>
126 #include <uvm/uvm_extern.h>
128 #include <dev/cons.h>
131 #include <machine/db_machdep.h>
132 #include <ddb/db_sym.h>
133 #include <ddb/db_extern.h>
135 #include <sys/kgdb.h>
138 #include <machine/bootconfig.h>
139 #include <machine/bus.h>
140 #include <machine/cpu.h>
141 #include <machine/frame.h>
142 #include <machine/intr.h>
143 #include <arm/undefined.h>
145 #include <arm/arm32/machdep.h>
147 #include <arm/s3c2xx0/s3c2410reg.h>
148 #include <arm/s3c2xx0/s3c2410var.h>
153 #define SDRAM_START S3C2410_SDRAM_START
156 #define SDRAM_SIZE (32*1024*1024)
160 * Address to map I/O registers in early initialize stage.
162 #define SMDK2410_IO_VBASE 0xfd000000
164 /* Kernel text starts 2MB in from the bottom of the kernel address space. */
165 #define KERNEL_TEXT_BASE (KERNEL_BASE + 0x00200000)
166 #define KERNEL_VM_BASE (KERNEL_BASE + 0x01000000)
169 * The range 0xc1000000 - 0xccffffff is available for kernel VM space
170 * Core-logic registers and I/O mappings occupy 0xfd000000 - 0xffffffff
172 #define KERNEL_VM_SIZE 0x0C000000
174 /* Memory disk support */
175 #if defined(MEMORY_DISK_DYNAMIC) && defined(MEMORY_DISK_ROOT_ADDR)
176 #define DO_MEMORY_DISK
177 /* We have memory disk image outside of the kernel on ROM. */
178 #ifdef MEMORY_DISK_ROOT_ROM
179 /* map the image directory and use read-only */
181 /* copy the image to RAM */
187 * Address to call from cpu_reset() to reset the machine.
188 * This is machine architecture dependant as it varies depending
189 * on where the ROM appears when you turn the MMU off.
191 u_int cpu_reset_address
= (u_int
)0;
193 /* Define various stack sizes in pages */
194 #define IRQ_STACK_SIZE 1
195 #define ABT_STACK_SIZE 1
196 #define UND_STACK_SIZE 1
198 BootConfig bootconfig
; /* Boot config storage */
199 char *boot_args
= NULL
;
200 char *boot_file
= NULL
;
202 vm_offset_t physical_start
;
203 vm_offset_t physical_freestart
;
204 vm_offset_t physical_freeend
;
205 vm_offset_t physical_end
;
209 #ifndef PMAP_STATIC_L1S
210 int max_processes
= 64; /* Default number */
211 #endif /* !PMAP_STATIC_L1S */
213 /* Physical and virtual addresses for some global pages */
217 pv_addr_t kernelstack
;
219 vm_offset_t msgbufphys
;
221 extern u_int data_abort_handler_address
;
222 extern u_int prefetch_abort_handler_address
;
223 extern u_int undefined_handler_address
;
226 extern int pmap_debug_level
;
229 #define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
230 #define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
231 #define KERNEL_PT_KERNEL_NUM 2 /* L2 tables for mapping kernel VM */
233 #define KERNEL_PT_VMDATA (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
235 #define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
236 #define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
238 pv_addr_t kernel_pt_table
[NUM_KERNEL_PTS
];
243 void kgdb_port_init(void);
248 #include <dev/ic/comreg.h>
249 #include <dev/ic/comvar.h>
254 #include "opt_sscom.h"
255 #include <arm/s3c2xx0/sscom_var.h>
259 * Define the default console speed for the board. This is generally
260 * what the firmware provided with the board defaults to.
263 #define CONSPEED B115200 /* TTYDEF_SPEED */
266 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
269 int comcnspeed
= CONSPEED
;
270 int comcnmode
= CONMODE
;
274 * void cpu_reboot(int howto, char *bootstr)
278 * Deal with any syncing, unmounting, dumping and shutdown hooks,
279 * then reset the CPU.
282 cpu_reboot(int howto
, char *bootstr
)
286 printf("boot: howto=%08x curproc=%p\n", howto
, curproc
);
289 cpu_reset_address
= vtophys((u_int
)s3c2410_softreset
);
292 * If we are still cold then hit the air brakes
293 * and crash to earth fast
297 pmf_system_shutdown(boothowto
);
298 printf("The operating system has halted.\n");
299 printf("Please press any key to reboot.\n\n");
301 printf("rebooting...\n");
305 /* Disable console buffering */
308 * If RB_NOSYNC was not specified sync the discs.
309 * Note: Unless cold is set to 1 here, syslogd will die during the
310 * unmount. It looks like syslogd is getting woken up only to find
311 * that it cannot page part of the binary in as the filesystem has
314 if (!(howto
& RB_NOSYNC
))
317 /* Say NO to interrupts */
320 /* Do a dump if requested. */
321 if ((howto
& (RB_DUMP
| RB_HALT
)) == RB_DUMP
)
324 /* Run any shutdown hooks */
327 pmf_system_shutdown(boothowto
);
329 /* Make sure IRQ's are disabled */
332 if (howto
& RB_HALT
) {
333 printf("The operating system has halted.\n");
334 printf("Please press any key to reboot.\n\n");
337 printf("rebooting...\n");
343 * Static device mappings. These peripheral registers are mapped at
344 * fixed virtual addresses very early in initarm() so that we can use
345 * them while booting the kernel , and stay at the same address
346 * throughout whole kernel's life time.
348 * We use this table twice; once with bootstrap page table, and once
349 * with kernel's page table which we build up in initarm().
351 * Since we map these registers into the bootstrap page table using
352 * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
353 * registers segment-aligned and segment-rounded in order to avoid
354 * using the 2nd page tables.
357 #define _A(a) ((a) & ~L1_S_OFFSET)
358 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
360 #define _V(n) (SMDK2410_IO_VBASE + (n) * L1_S_SIZE)
362 #define GPIO_VBASE _V(0)
363 #define INTCTL_VBASE _V(1)
364 #define CLKMAN_VBASE _V(2)
365 #define UART_VBASE _V(3)
366 #ifdef MEMORY_DISK_DYNAMIC
367 #define MEMORY_DISK_VADDR _V(4)
370 static const struct pmap_devmap smdk2410_devmap
[] = {
374 _A(S3C2410_GPIO_BASE
),
375 _S(S3C2410_GPIO_SIZE
),
376 VM_PROT_READ
|VM_PROT_WRITE
, PTE_NOCACHE
,
380 _A(S3C2410_INTCTL_BASE
),
381 _S(S3C2410_INTCTL_SIZE
),
382 VM_PROT_READ
|VM_PROT_WRITE
, PTE_NOCACHE
,
386 _A(S3C2410_CLKMAN_BASE
),
387 _S(S3C24X0_CLKMAN_SIZE
),
388 VM_PROT_READ
|VM_PROT_WRITE
, PTE_NOCACHE
,
390 { /* UART registers for UART0, 1, 2. */
392 _A(S3C2410_UART0_BASE
),
393 _S(S3C2410_UART_BASE(3) - S3C2410_UART0_BASE
),
394 VM_PROT_READ
|VM_PROT_WRITE
, PTE_NOCACHE
,
403 static inline pd_entry_t
*
408 __asm
volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(ttb
));
411 return (pd_entry_t
*)(ttb
& ~((1 << 14) - 1));
415 #define ioreg_read8(a) (*(volatile uint8_t *)(a))
416 #define ioreg_write8(a,v) (*(volatile uint8_t *)(a)=(v))
417 #define ioreg_read32(a) (*(volatile uint32_t *)(a))
418 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
423 * Initial entry point on startup. This gets called before main() is
425 * It should be responsible for setting up everything that must be
426 * in place when main is called.
428 * Taking a copy of the boot configuration structure.
429 * Initialising the physical console so characters can be printed.
430 * Setting up page tables for the kernel
431 * Relocating the kernel to the bottom of physical memory
440 extern int etext
__asm("_etext");
441 extern int end
__asm("_end");
442 int progress_counter
= 0;
444 #ifdef DO_MEMORY_DISK
445 vm_offset_t md_root_start
;
446 #define MD_ROOT_SIZE (MEMORY_DISK_ROOT_SIZE * DEV_BSIZE)
449 #define gpio_read8(reg) ioreg_read8(GPIO_VBASE + (reg))
451 #define LEDSTEP() __LED(progress_counter++)
453 #define pdatf (*(volatile uint8_t *)(S3C2410_GPIO_BASE+GPIO_PFDAT))
454 #define __LED(x) (pdatf = (pdatf & ~0xf0) | (~(x) & 0xf0))
458 /* CS8900A on CS3 and CL-PD7610 need nBE1 signal. make sure
459 * memory controller is set correctly. (USB download firmware
460 * doesn't do this right) Also, we use WAIT signal for them.
462 ioreg_write32(S3C2410_MEMCTL_BASE
+ MEMCTL_BWSCON
,
463 (BWSCON_ST
|BWSCON_WS
) << BWSCON_BANK_SHIFT(2) |
464 (BWSCON_ST
|BWSCON_WS
) << BWSCON_BANK_SHIFT(3) |
465 ioreg_read32(S3C2410_MEMCTL_BASE
+ MEMCTL_BWSCON
));
466 /* tweak access timing for CS8900A */
467 ioreg_write32(S3C2410_MEMCTL_BASE
+ MEMCTL_BANKCON(3),
468 (0<<BANKCON_TACS_SHIFT
)|(1<<BANKCON_TCOS_SHIFT
)|
469 (7<<BANKCON_TACC_SHIFT
)|(0<<BANKCON_TOCH_SHIFT
)|
470 (0<<BANKCON_TCAH_SHIFT
));
473 * Heads up ... Setup the CPU / MMU / TLB functions
476 panic("cpu not recognized!");
481 * Map I/O registers that are used in startup. Now we are
482 * still using page table prepared by bootloader. Later we'll
483 * map those registers at the same address in the kernel page
486 pmap_devmap_bootstrap((vaddr_t
)read_ttb(), smdk2410_devmap
);
489 #define pdatf (*(volatile uint8_t *)(GPIO_VBASE+GPIO_PFDAT))
494 /* Disable all peripheral interrupts */
495 ioreg_write32(INTCTL_VBASE
+ INTCTL_INTMSK
, ~0);
497 /* initialize some variables so that splfoo() doesn't
498 touch illegal address. */
499 s3c2xx0_intr_bootstrap(INTCTL_VBASE
);
502 #ifdef VERBOSE_INIT_ARM
503 printf("consinit done\n");
512 #ifdef VERBOSE_INIT_ARM
513 /* Talk to the user */
514 printf("\nNetBSD/evbarm (SMDK2410) booting ...\n");
517 * Ok we have the following memory map
519 * Physical Address Range Description
520 * ----------------------- ----------------------------------
521 * 0x00000000 - 0x00ffffff Intel flash Memory (16MB)
522 * 0x02000000 - 0x020fffff AMD flash Memory (1MB)
523 * or (depend on DIPSW setting)
524 * 0x00000000 - 0x000fffff AMD flash Memory (1MB)
525 * 0x02000000 - 0x02ffffff Intel flash Memory (16MB)
527 * 0x30000000 - 0x31ffffff SDRAM (32MB)
529 * The initarm() has the responsibility for creating the kernel
531 * It must also set up various memory pointers that are used
535 /* Fake bootconfig structure for the benefit of pmap.c */
536 /* XXX must make the memory description h/w independent */
537 bootconfig
.dramblocks
= 1;
538 bootconfig
.dram
[0].address
= SDRAM_START
;
539 bootconfig
.dram
[0].pages
= SDRAM_SIZE
/ PAGE_SIZE
;
542 * Set up the variables that define the availablilty of
543 * physical memory. For now, we're going to set
544 * physical_freestart to 0x08200000 (where the kernel
545 * was loaded), and allocate the memory we need downwards.
546 * If we get too close to the bottom of SDRAM, we
547 * will panic. We will update physical_freestart and
548 * physical_freeend later to reflect what pmap_bootstrap()
551 * XXX pmap_bootstrap() needs an enema.
553 physical_start
= bootconfig
.dram
[0].address
;
554 physical_end
= physical_start
+ (bootconfig
.dram
[0].pages
* PAGE_SIZE
);
556 #ifdef DO_MEMORY_DISK
557 #ifdef MEMORY_DISK_ROOT_ROM
558 md_root_start
= MEMORY_DISK_ROOT_ADDR
;
559 boothowto
|= RB_RDONLY
;
561 /* Reserve physmem for ram disk */
562 md_root_start
= ((physical_end
- MD_ROOT_SIZE
) & ~(L1_S_SIZE
-1));
563 printf("Reserve %ld bytes for memory disk\n",
564 physical_end
- md_root_start
);
565 /* copy fs contents */
566 memcpy((void *)md_root_start
, (void *)MEMORY_DISK_ROOT_ADDR
,
568 physical_end
= md_root_start
;
572 physical_freestart
= SDRAM_START
; /* XXX */
573 physical_freeend
= SDRAM_START
+ 0x00200000;
575 physmem
= (physical_end
- physical_start
) / PAGE_SIZE
;
577 #ifdef VERBOSE_INIT_ARM
578 /* Tell the user about the memory */
579 printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem
,
580 physical_start
, physical_end
- 1);
585 * Okay, the kernel starts 2MB in from the bottom of physical
586 * memory. We are going to allocate our bootstrap pages downwards
589 * We need to allocate some fixed page tables to get the kernel
590 * going. We allocate one page directory and a number of page
591 * tables and store the physical addresses in the kernel_pt_table
594 * The kernel page directory must be on a 16K boundary. The page
595 * tables must be on 4K boundaries. What we do is allocate the
596 * page directory on the first 16K boundary that we encounter, and
597 * the page tables on 4K boundaries otherwise. Since we allocate
598 * at least 3 L2 page tables, we are guaranteed to encounter at
599 * least one 16K aligned region.
602 #ifdef VERBOSE_INIT_ARM
603 printf("Allocating page tables\n");
606 free_pages
= (physical_freeend
- physical_freestart
) / PAGE_SIZE
;
608 #ifdef VERBOSE_INIT_ARM
609 printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
610 physical_freestart
, free_pages
, free_pages
);
613 /* Define a macro to simplify memory allocation */
614 #define valloc_pages(var, np) \
615 alloc_pages((var).pv_pa, (np)); \
616 (var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
618 #define alloc_pages(var, np) \
619 physical_freeend -= ((np) * PAGE_SIZE); \
620 if (physical_freeend < physical_freestart) \
621 panic("initarm: out of memory"); \
622 (var) = physical_freeend; \
623 free_pages -= (np); \
624 memset((char *)(var), 0, ((np) * PAGE_SIZE));
627 for (loop
= 0; loop
<= NUM_KERNEL_PTS
; ++loop
) {
628 /* Are we 16KB aligned for an L1 ? */
629 if (((physical_freeend
- L1_TABLE_SIZE
) & (L1_TABLE_SIZE
- 1)) == 0
630 && kernel_l1pt
.pv_pa
== 0) {
631 valloc_pages(kernel_l1pt
, L1_TABLE_SIZE
/ PAGE_SIZE
);
633 valloc_pages(kernel_pt_table
[loop1
],
634 L2_TABLE_SIZE
/ PAGE_SIZE
);
639 /* This should never be able to happen but better confirm that. */
640 if (!kernel_l1pt
.pv_pa
|| (kernel_l1pt
.pv_pa
& (L1_TABLE_SIZE
- 1)) != 0)
641 panic("initarm: Failed to align the kernel page directory\n");
644 * Allocate a page for the system page mapped to V0x00000000
645 * This page will just contain the system vectors and can be
646 * shared by all processes.
648 alloc_pages(systempage
.pv_pa
, 1);
650 /* Allocate stacks for all modes */
651 valloc_pages(irqstack
, IRQ_STACK_SIZE
);
652 valloc_pages(abtstack
, ABT_STACK_SIZE
);
653 valloc_pages(undstack
, UND_STACK_SIZE
);
654 valloc_pages(kernelstack
, UPAGES
);
656 #ifdef VERBOSE_INIT_ARM
657 printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack
.pv_pa
,
659 printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack
.pv_pa
,
661 printf("UND stack: p0x%08lx v0x%08lx\n", undstack
.pv_pa
,
663 printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack
.pv_pa
,
667 alloc_pages(msgbufphys
, round_page(MSGBUFSIZE
) / PAGE_SIZE
);
672 * Ok we have allocated physical pages for the primary kernel
676 #ifdef VERBOSE_INIT_ARM
677 printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt
.pv_pa
);
681 * Now we start construction of the L1 page table
682 * We start by mapping the L2 page tables into the L1.
683 * This means that we can replace L1 mappings later on if necessary
685 l1pagetable
= kernel_l1pt
.pv_pa
;
687 /* Map the L2 pages tables in the L1 page table */
688 pmap_link_l2pt(l1pagetable
, 0x00000000,
689 &kernel_pt_table
[KERNEL_PT_SYS
]);
690 for (loop
= 0; loop
< KERNEL_PT_KERNEL_NUM
; loop
++)
691 pmap_link_l2pt(l1pagetable
, KERNEL_BASE
+ loop
* 0x00400000,
692 &kernel_pt_table
[KERNEL_PT_KERNEL
+ loop
]);
693 for (loop
= 0; loop
< KERNEL_PT_VMDATA_NUM
; loop
++)
694 pmap_link_l2pt(l1pagetable
, KERNEL_VM_BASE
+ loop
* 0x00400000,
695 &kernel_pt_table
[KERNEL_PT_VMDATA
+ loop
]);
697 /* update the top of the kernel VM */
699 KERNEL_VM_BASE
+ (KERNEL_PT_VMDATA_NUM
* 0x00400000);
701 #ifdef VERBOSE_INIT_ARM
702 printf("Mapping kernel\n");
705 /* Now we fill in the L2 pagetable for the kernel static code/data */
707 size_t textsize
= (uintptr_t)&etext
- KERNEL_TEXT_BASE
;
708 size_t totalsize
= (uintptr_t)&end
- KERNEL_TEXT_BASE
;
711 textsize
= (textsize
+ PGOFSET
) & ~PGOFSET
;
712 totalsize
= (totalsize
+ PGOFSET
) & ~PGOFSET
;
714 logical
= 0x00200000; /* offset of kernel in RAM */
716 logical
+= pmap_map_chunk(l1pagetable
, KERNEL_BASE
+ logical
,
717 physical_start
+ logical
, textsize
,
718 VM_PROT_READ
| VM_PROT_WRITE
, PTE_CACHE
);
719 logical
+= pmap_map_chunk(l1pagetable
, KERNEL_BASE
+ logical
,
720 physical_start
+ logical
, totalsize
- textsize
,
721 VM_PROT_READ
| VM_PROT_WRITE
, PTE_CACHE
);
724 #ifdef VERBOSE_INIT_ARM
725 printf("Constructing L2 page tables\n");
728 /* Map the stack pages */
729 pmap_map_chunk(l1pagetable
, irqstack
.pv_va
, irqstack
.pv_pa
,
730 IRQ_STACK_SIZE
* PAGE_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
,
732 pmap_map_chunk(l1pagetable
, abtstack
.pv_va
, abtstack
.pv_pa
,
733 ABT_STACK_SIZE
* PAGE_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
,
735 pmap_map_chunk(l1pagetable
, undstack
.pv_va
, undstack
.pv_pa
,
736 UND_STACK_SIZE
* PAGE_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
,
738 pmap_map_chunk(l1pagetable
, kernelstack
.pv_va
, kernelstack
.pv_pa
,
739 UPAGES
* PAGE_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
, PTE_CACHE
);
741 pmap_map_chunk(l1pagetable
, kernel_l1pt
.pv_va
, kernel_l1pt
.pv_pa
,
742 L1_TABLE_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
, PTE_PAGETABLE
);
744 for (loop
= 0; loop
< NUM_KERNEL_PTS
; ++loop
) {
745 pmap_map_chunk(l1pagetable
, kernel_pt_table
[loop
].pv_va
,
746 kernel_pt_table
[loop
].pv_pa
, L2_TABLE_SIZE
,
747 VM_PROT_READ
|VM_PROT_WRITE
, PTE_PAGETABLE
);
750 /* Map the vector page. */
752 /* MULTI-ICE requires that page 0 is NC/NB so that it can download the
753 * cache-clean code there. */
754 pmap_map_entry(l1pagetable
, vector_page
, systempage
.pv_pa
,
755 VM_PROT_READ
| VM_PROT_WRITE
, PTE_NOCACHE
);
757 pmap_map_entry(l1pagetable
, vector_page
, systempage
.pv_pa
,
758 VM_PROT_READ
| VM_PROT_WRITE
, PTE_CACHE
);
761 #ifdef MEMORY_DISK_DYNAMIC
762 /* map MD root image */
763 pmap_map_chunk(l1pagetable
, MEMORY_DISK_VADDR
, md_root_start
,
764 MD_ROOT_SIZE
, VM_PROT_READ
| VM_PROT_WRITE
, PTE_CACHE
);
766 md_root_setconf((void *)md_root_start
, MD_ROOT_SIZE
);
767 #endif /* MEMORY_DISK_DYNAMIC */
769 * map integrated peripherals at same address in l1pagetable
770 * so that we can continue to use console.
772 pmap_devmap_bootstrap(l1pagetable
, smdk2410_devmap
);
775 * Now we have the real page tables in place so we can switch to them.
776 * Once this is done we will be running with the REAL kernel page
781 * Update the physical_freestart/physical_freeend/free_pages
785 physical_freestart
= physical_start
+
786 (((((uintptr_t)&end
) + PGOFSET
) & ~PGOFSET
) - KERNEL_BASE
);
787 physical_freeend
= physical_end
;
789 (physical_freeend
- physical_freestart
) / PAGE_SIZE
;
793 #ifdef VERBOSE_INIT_ARM
794 printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
795 physical_freestart
, free_pages
, free_pages
);
796 printf("switching to new L1 page table @%#lx...", kernel_l1pt
.pv_pa
);
799 cpu_domains((DOMAIN_CLIENT
<< (PMAP_DOMAIN_KERNEL
*2)) | DOMAIN_CLIENT
);
800 cpu_setttb(kernel_l1pt
.pv_pa
);
802 cpu_domains(DOMAIN_CLIENT
<< (PMAP_DOMAIN_KERNEL
*2));
805 * Moved from cpu_startup() as data_abort_handler() references
806 * this during uvm init
808 uvm_lwp_setuarea(&lwp0
, kernelstack
.pv_va
);
810 #ifdef VERBOSE_INIT_ARM
815 #ifdef VERBOSE_INIT_ARM
816 printf("bootstrap done.\n");
819 arm32_vector_init(ARM_VECTORS_LOW
, ARM_VEC_ALL
);
822 * Pages were allocated during the secondary bootstrap for the
823 * stacks for different CPU modes.
824 * We must now set the r13 registers in the different CPU modes to
825 * point to these stacks.
826 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
827 * of the stack memory.
829 #ifdef VERBOSE_INIT_ARM
830 printf("init subsystems: stacks ");
833 set_stackptr(PSR_IRQ32_MODE
,
834 irqstack
.pv_va
+ IRQ_STACK_SIZE
* PAGE_SIZE
);
835 set_stackptr(PSR_ABT32_MODE
,
836 abtstack
.pv_va
+ ABT_STACK_SIZE
* PAGE_SIZE
);
837 set_stackptr(PSR_UND32_MODE
,
838 undstack
.pv_va
+ UND_STACK_SIZE
* PAGE_SIZE
);
843 * Well we should set a data abort handler.
844 * Once things get going this will change as we will need a proper
846 * Until then we will use a handler that just panics but tells us
848 * Initialisation of the vectors will just panic on a data abort.
849 * This just fills in a slightly better one.
851 #ifdef VERBOSE_INIT_ARM
854 data_abort_handler_address
= (u_int
)data_abort_handler
;
855 prefetch_abort_handler_address
= (u_int
)prefetch_abort_handler
;
856 undefined_handler_address
= (u_int
)undefinedinstruction_bounce
;
858 /* Initialise the undefined instruction handlers */
859 #ifdef VERBOSE_INIT_ARM
860 printf("undefined ");
866 /* Load memory into UVM. */
867 #ifdef VERBOSE_INIT_ARM
870 uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
871 uvm_page_physload(atop(physical_freestart
), atop(physical_freeend
),
872 atop(physical_freestart
), atop(physical_freeend
),
873 VM_FREELIST_DEFAULT
);
876 /* Boot strap pmap telling it where the kernel page table is */
877 #ifdef VERBOSE_INIT_ARM
880 pmap_bootstrap(KERNEL_VM_BASE
, KERNEL_VM_BASE
+ KERNEL_VM_SIZE
);
884 /* Setup the IRQ system */
885 #ifdef VERBOSE_INIT_ARM
888 /* XXX irq_init(); */
890 #ifdef VERBOSE_INIT_ARM
895 boothowto
|= BOOTHOWTO
;
898 uint8_t gpio
= ~gpio_read8(GPIO_PFDAT
);
900 if (gpio
& (1<<0)) /* SW1 (EINT0) */
901 boothowto
^= RB_SINGLE
;
902 if (gpio
& (1<<2)) /* SW2 (EINT2) */
904 #ifdef VERBOSE_INIT_ARM
905 printf( "sw: %x boothowto: %x\n", gpio
, boothowto
);
910 if (boothowto
& RB_KDB
) {
918 if (boothowto
& RB_KDB
)
922 /* We return the new stack pointer address */
923 return (kernelstack
.pv_va
+ USPACE_SVC_STACK_TOP
);
929 static int consinit_done
= 0;
930 bus_space_tag_t iot
= &s3c2xx0_bs_tag
;
933 if (consinit_done
!= 0)
938 s3c24x0_clock_freq2(CLKMAN_VBASE
, NULL
, NULL
, &pclk
);
942 if (0 == s3c2410_sscom_cnattach(iot
, 0, comcnspeed
,
947 if (0 == s3c2410_sscom_cnattach(iot
, 1, comcnspeed
,
952 #if NCOM>0 && defined(CONCOMADDR)
953 if (comcnattach(&isa_io_bs_tag
, CONCOMADDR
, comcnspeed
,
954 COM_FREQ
, COM_TYPE_NORMAL
, comcnmode
))
955 panic("can't init serial console @%x", CONCOMADDR
);
968 const char kgdb_devname
[] = KGDB_DEVNAME
;
970 const char kgdb_devname
[] = "";
974 #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE|CSTOPB|PARENB))|CS8) /* 8N1 */
976 int kgdb_sscom_mode
= KGDB_DEVMODE
;
987 if (strcmp(kgdb_devname
, "sscom0") == 0)
989 else if (strcmp(kgdb_devname
, "sscom1") == 0)
993 s3c24x0_clock_freq2(CLKMAN_VBASE
, NULL
, NULL
, &pclk
);
995 s3c2410_sscom_kgdb_attach(&s3c2xx0_bs_tag
,
996 unit
, kgdb_rate
, pclk
, kgdb_sscom_mode
);
1003 writeback_dcache_line(vaddr_t va
)
1005 /* writeback Dcache line */
1006 /* we can't use cpu_dcache_wb_range() here, because cpufuncs for ARM9
1007 * assume write-through cache, and always flush Dcache instead of
1008 * cleaning it. Since Boot loader maps page table with write-back
1009 * cached, we really need to clean Dcache. */
1010 __asm("mcr p15, 0, %0, c7, c10, 1"
1015 clean_dcache_line(vaddr_t va
)
1017 /* writeback and invalidate Dcache line */
1018 __asm("mcr p15, 0, %0, c7, c14, 1"
1022 static struct arm32_dma_range smdk2410_dma_ranges
[1];
1025 s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag
*dma_tag_template
)
1027 extern paddr_t physical_start
, physical_end
;
1028 struct arm32_bus_dma_tag
*dmat
;
1030 smdk2410_dma_ranges
[0].dr_sysbase
= physical_start
;
1031 smdk2410_dma_ranges
[0].dr_busbase
= physical_start
;
1032 smdk2410_dma_ranges
[0].dr_len
= physical_end
- physical_start
;
1035 dmat
= dma_tag_template
;
1037 dmat
= malloc(sizeof *dmat
, M_DEVBUF
, M_NOWAIT
);
1040 *dmat
= *dma_tag_template
;
1043 dmat
->_ranges
= smdk2410_dma_ranges
;