sys/arch/hp300/dev/dmavar.h

   1 /*      $NetBSD: dmavar.h,v 1.13 2005/12/11 12:17:13 christos Exp $     */
   2
   3 /*-
   4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Copyright (c) 1982, 1990, 1993
  34  *      The Regents of the University of California.  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. Neither the name of the University nor the names of its contributors
  45  *    may be used to endorse or promote products derived from this software
  46  *    without specific prior written permission.
  47  *
  48  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  49  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  50  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  51  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  52  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  53  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  54  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  55  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  56  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  57  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  58  * SUCH DAMAGE.
  59  *
  60  *      @(#)dmavar.h    8.1 (Berkeley) 6/10/93
  61  */
  62
  63 #include <sys/queue.h>
  64
  65 /* dmago flags */
  66 #define DMAGO_BYTE      0x00    /* do byte (8 bit) transfers */
  67 #define DMAGO_WORD      0x01    /* do word (16 bit) transfers */
  68 #define DMAGO_LWORD     0x02    /* do longword (32 bit) transfers */
  69 #define DMAGO_PRI       0x04    /* do "priority" DMA */
  70 #define DMAGO_READ      0x08    /* transfer is a read */
  71 #define DMAGO_NOINT     0x80    /* don't interrupt on completion */
  72
  73 /* dma "controllers" (channels) */
  74 #define DMA0            0x1
  75 #define DMA1            0x2
  76
  77 /*
  78  * A DMA queue entry.  Initiator drivers each have one of these,
  79  * used to queue access to the DMA controller.
  80  */
  81 struct dmaqueue {
  82         TAILQ_ENTRY(dmaqueue) dq_list;  /* entry on the queue */
  83         int     dq_chan;                /* OR of channels initiator can use */
  84         void    *dq_softc;              /* initiator's softc */
  85
  86         /*
  87          * These functions are called to start the initiator when
  88          * it has been given the DMA controller, and to stop the
  89          * initiator when the DMA controller has stopped.
  90          */
  91         void    (*dq_start)(void *);
  92         void    (*dq_done)(void *);
  93 };
  94
  95 #ifdef _KERNEL
  96 void    dmainit(void);
  97 void    dmago(int, char *, int, int);
  98 void    dmastop(int);
  99 void    dmafree(struct dmaqueue *);
 100 int     dmareq(struct dmaqueue *);
 101 void    dmacomputeipl(void);
 102 #endif /* _KERNEL */