sys/arch/hp300/dev/nhpibreg.h

   1 /*      $NetBSD: nhpibreg.h,v 1.5.66.3 2004/09/21 13:15:16 skrll Exp $  */
   2
   3 /*
   4  * Copyright (c) 1982, 1990, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. Neither the name of the University nor the names of its contributors
  16  *    may be used to endorse or promote products derived from this software
  17  *    without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  *
  31  *      @(#)nhpibreg.h  8.1 (Berkeley) 6/10/93
  32  */
  33
  34 #include <hp300/dev/iotypes.h>  /* XXX */
  35
  36 struct  nhpibdevice {
  37         u_char  hpib_pad0;
  38         vu_char hpib_cid;
  39         u_char  hpib_pad1;
  40 #define hpib_ie         hpib_ids
  41         vu_char hpib_ids;
  42         u_char  hpib_pad2;
  43         vu_char hpib_csa;
  44         u_char  hpib_pad3[11];
  45 #define hpib_mim        hpib_mis
  46         vu_char hpib_mis;
  47         u_char  hpib_pad4;
  48 #define hpib_lim        hpib_lis
  49         vu_char hpib_lis;
  50         u_char  hpib_pad5;
  51         vu_char hpib_is;
  52         u_char  hpib_pad6;
  53 #define hpib_acr        hpib_cls
  54         vu_char hpib_cls;
  55         u_char  hpib_pad7;
  56         vu_char hpib_ar;
  57         u_char  hpib_pad8;
  58         vu_char hpib_sprb;
  59         u_char  hpib_pad9;
  60 #define hpib_ppr        hpib_cpt
  61         vu_char hpib_cpt;
  62         u_char  hpib_pad10;
  63         vu_char hpib_data;
  64 };
  65
  66 /*
  67  * Bits in hpib_lis (and hpib_lim).
  68  */
  69 #define LIS_IFC         0x01
  70 #define LIS_SRQ         0x02
  71 #define LIS_MA          0x04
  72 #define LIS_DCAS        0x08
  73 #define LIS_APT         0x10
  74 #define LIS_UCG         0x20
  75 #define LIS_ERR         0x40
  76 #define LIS_GET         0x80
  77
  78 #define MIS_END         0x08
  79 #define MIS_BO          0x10
  80 #define MIS_BI          0x20
  81
  82 #define IS_TADS         0x02
  83 #define IS_LADS         0x04
  84
  85 /*
  86  * ti9914 "Auxiliary Commands" - Some are Set/Clear, others pulse.
  87  */
  88 #define AUX_CSWRST      0x00    /* End software reset */
  89 #define AUX_RHDF        0x02    /* release RFD (ready for data) holdoff */
  90 #define AUX_CHDFA       0x03    /* Clear holdoff on all data */
  91 #define AUX_CHDFE       0x04    /* Clear holdoff on EOI data only */
  92 #define AUX_EOI         0x08    /* Pulse EOI (with data) */
  93 #define AUX_CLON        0x09    /* Clear listen only */
  94 #define AUX_CTON        0x0a    /* Clear talk only */
  95 #define AUX_GTS         0x0b    /* Go to standby (clears ATN line) */
  96 #define AUX_TCA         0x0c    /* Take control (async) */
  97 #define AUX_TCS         0x0d    /* Take control (sync) */
  98 #define AUX_CPP         0x0e    /* Clear parallel poll */
  99 #define AUX_CSIC        0x0f    /* Clear IFC (interface clear) line */
 100 #define AUX_CSRE        0x10    /* Clear REN (remote enable) line */
 101 #define AUX_CDAI        0x13    /* Clear interrupt disable */
 102 #define AUX_CSTD1       0x15    /* Clear 1200ns T1 delay */
 103 #define AUX_CSHDW       0x16    /* Clear shadow handshake */
 104 #define AUX_CVSTD1      0x17    /* Clear 600ns T1 delay */
 105
 106 #define AUX_SSWRST      0x80    /* Start software reset */
 107 #define AUX_SHDFA       0x83    /* Set holdoff on all data */
 108 #define AUX_SHDFE       0x84    /* Set holdoff on EOI data only */
 109 #define AUX_SLON        0x89    /* Set listen only */
 110 #define AUX_STON        0x8a    /* Set talk only */
 111 #define AUX_SPP         0x8e    /* Set parallel poll */
 112 #define AUX_SSIC        0x8f    /* Set IFC line */
 113 #define AUX_SSRE        0x90    /* Set REN line */
 114 #define AUX_SDAI        0x93    /* Disable all interrupts */
 115 #define AUX_SSTD1       0x95    /* Set T1 delay to 1200ns */
 116 #define AUX_SSHDW       0x96    /* Set shadow handshake */
 117 #define AUX_SVSTD1      0x97    /* Set T1 delay to 600ns */