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[netbsd-mini2440.git] / sys / arch / hp300 / include / intr.h
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1 /* $NetBSD: intr.h,v 1.32 2008/12/21 17:42:05 tsutsui Exp $ */
3 /*-
4 * Copyright (c) 1996, 1997, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #ifndef _HP300_INTR_H_
33 #define _HP300_INTR_H_
35 #include <sys/evcnt.h>
36 #include <sys/queue.h>
37 #include <machine/psl.h>
40 * Interrupt "levels". These are a more abstract representation
41 * of interrupt levels, and do not have the same meaning as m68k
42 * CPU interrupt levels. They serve the following purposes:
44 * - properly order ISRs in the list for that CPU ipl
45 * - compute CPU PSL values for the spl*() calls.
46 * - used to create cookie for the splraiseipl().
48 #define IPL_NONE 0
49 #define IPL_SOFTCLOCK 1
50 #define IPL_SOFTBIO 2
51 #define IPL_SOFTNET 3
52 #define IPL_SOFTSERIAL 4
53 #define IPL_VM 5
54 #define IPL_SCHED 6
55 #define IPL_HIGH 7
56 #define NIPL 8
59 * Convert PSL values to m68k CPU IPLs and vice-versa.
60 * Note: CPU IPL values are different from IPL_* used by splraiseipl().
62 #define PSLTOIPL(x) (((x) >> 8) & 0xf)
63 #define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
65 extern int idepth;
67 static inline bool
68 cpu_intr_p(void)
71 return idepth != 0;
74 extern const uint16_t ipl2psl_table[NIPL];
76 typedef int ipl_t;
77 typedef struct {
78 uint16_t _psl;
79 } ipl_cookie_t;
81 static inline ipl_cookie_t
82 makeiplcookie(ipl_t ipl)
85 return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
88 static inline int
89 splraiseipl(ipl_cookie_t icookie)
92 return _splraise(icookie._psl);
95 static inline void
96 splx(int sr)
99 __asm volatile("movew %0,%%sr" : : "di" (sr));
102 /* These spl calls are _not_ to be used by machine-independent code. */
103 #define splhil() splraise1()
104 #define splkbd() splhil()
106 /* These spl calls are used by machine-independent code. */
107 #define spl0() _spl0()
109 #define splsoftbio() splraise1()
110 #define splsoftclock() splraise1()
111 #define splsoftnet() splraise1()
112 #define splsoftserial() splraise1()
113 #define splvm() splraise5()
114 #define splsched() spl6()
115 #define splhigh() spl7()
117 struct hp300_intrhand {
118 LIST_ENTRY(hp300_intrhand) ih_q;
119 int (*ih_fn)(void *);
120 void *ih_arg;
121 int ih_ipl;
122 int ih_priority;
125 struct hp300_intr {
126 LIST_HEAD(, hp300_intrhand) hi_q;
127 struct evcnt hi_evcnt;
130 /* intr.c */
131 void intr_init(void);
132 void *intr_establish(int (*)(void *), void *, int, int);
133 void intr_disestablish(void *);
134 void intr_dispatch(int);
136 #endif /* _HP300_INTR_H_ */