sys/arch/hp700/dev/mongoose.c

   1 /*      $NetBSD: mongoose.c,v 1.16 2009/08/19 15:13:24 dyoung Exp $     */
   2
   3 /*      $OpenBSD: mongoose.c,v 1.7 2000/08/15 19:42:56 mickey Exp $     */
   4
   5 /*
   6  * Copyright (c) 1998-2003 Michael Shalayeff
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
  22  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  24  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  27  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  28  * THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include <sys/cdefs.h>
  32 __KERNEL_RCSID(0, "$NetBSD: mongoose.c,v 1.16 2009/08/19 15:13:24 dyoung Exp $");
  33
  34 #define MONGOOSE_DEBUG 9
  35
  36 #include <sys/param.h>
  37 #include <sys/systm.h>
  38 #include <sys/device.h>
  39 #include <sys/reboot.h>
  40
  41 #include <machine/bus.h>
  42 #include <machine/iomod.h>
  43 #include <machine/autoconf.h>
  44
  45 #include <hp700/hp700/intr.h>
  46 #include <hp700/dev/cpudevs.h>
  47 #include <hp700/dev/viper.h>
  48
  49 #include <dev/eisa/eisareg.h>
  50 #include <dev/eisa/eisavar.h>
  51
  52 #include <dev/isa/isareg.h>
  53 #include <dev/isa/isavar.h>
  54
  55 /* EISA Bus Adapter registers definitions */
  56 #define MONGOOSE_MONGOOSE       0x10000
  57 struct mongoose_regs {
  58         uint8_t version;
  59         uint8_t lock;
  60         uint8_t liowait;
  61         uint8_t clock;
  62         uint8_t reserved[0xf000 - 4];
  63         uint8_t intack;
  64 };
  65
  66 #define MONGOOSE_CTRL           0x00000
  67 #define MONGOOSE_NINTS          16
  68 struct mongoose_ctrl {
  69         struct dma0 {
  70                 struct {
  71                         uint32_t        addr : 8;
  72                         uint32_t        count: 8;
  73                 } ch[4];
  74                 uint8_t command;
  75                 uint8_t request;
  76                 uint8_t mask_channel;
  77                 uint8_t mode;
  78                 uint8_t clr_byte_ptr;
  79                 uint8_t master_clear;
  80                 uint8_t mask_clear;
  81                 uint8_t master_write;
  82                 uint8_t pad[8];
  83         }       dma0;
  84
  85         uint8_t irr0;           /* 0x20 */
  86         uint8_t imr0;
  87         uint8_t iack;           /* 0x22 -- 2 b2b reads generate
  88                                         (e)isa Iack cycle & returns int level */
  89         uint8_t pad0[29];
  90
  91         struct timers {
  92                 uint8_t sysclk;
  93                 uint8_t refresh;
  94                 uint8_t spkr;
  95                 uint8_t ctrl;
  96                 uint32_t        pad;
  97         }       tmr[2];                 /* 0x40 -- timers control */
  98         uint8_t pad1[16];
  99
 100         uint16_t        inmi;           /* 0x60 NMI control */
 101         uint8_t pad2[30];
 102         struct {
 103                 uint8_t pad0;
 104                 uint8_t ch2;
 105                 uint8_t ch3;
 106                 uint8_t ch1;
 107                 uint8_t pad1;
 108                 uint8_t pad2[3];
 109                 uint8_t ch0;
 110                 uint8_t pad4;
 111                 uint8_t ch6;
 112                 uint8_t ch7;
 113                 uint8_t ch5;
 114                 uint8_t pad5[3];
 115                 uint8_t pad6[16];
 116         } pr;                           /* 0x80 */
 117
 118         uint8_t irr1;           /* 0xa0 */
 119         uint8_t imr1;
 120         uint8_t pad3[30];
 121
 122         struct dma1 {
 123                 struct {
 124                         uint32_t        addr : 8;
 125                         uint32_t        pad0 : 8;
 126                         uint32_t        count: 8;
 127                         uint32_t        pad1 : 8;
 128                 } ch[4];
 129                 uint8_t command;
 130                 uint8_t pad0;
 131                 uint8_t request;
 132                 uint8_t pad1;
 133                 uint8_t mask_channel;
 134                 uint8_t pad2;
 135                 uint8_t mode;
 136                 uint8_t pad3;
 137                 uint8_t clr_byte_ptr;
 138                 uint8_t pad4;
 139                 uint8_t master_clear;
 140                 uint8_t pad5;
 141                 uint8_t mask_clear;
 142                 uint8_t pad6;
 143                 uint8_t master_write;
 144                 uint8_t pad7;
 145         }       dma1;                   /* 0xc0 */
 146
 147         uint8_t master_req;     /* 0xe0 master request register */
 148         uint8_t pad4[31];
 149
 150         uint8_t pad5[0x3d0];    /* 0x4d0 */
 151         uint8_t pic0;           /* 0 - edge, 1 - level */
 152         uint8_t pic1;
 153         uint8_t pad6[0x460];
 154         uint8_t nmi;
 155         uint8_t nmi_ext;
 156 #define MONGOOSE_NMI_BUSRESET   0x01
 157 #define MONGOOSE_NMI_IOPORT_EN  0x02
 158 #define MONGOOSE_NMI_EN         0x04
 159 #define MONGOOSE_NMI_MTMO_EN    0x08
 160 #define MONGOOSE_NMI_RES4       0x10
 161 #define MONGOOSE_NMI_IOPORT_INT 0x20
 162 #define MONGOOSE_NMI_MASTER_INT 0x40
 163 #define MONGOOSE_NMI_INT        0x80
 164 };
 165
 166 #define MONGOOSE_IOMAP  0x100000
 167
 168 struct hppa_isa_iv {
 169         int (*iv_handler)(void *arg);
 170         void *iv_arg;
 171         int iv_pri;
 172
 173         struct evcnt iv_evcnt;
 174         /* don't do sharing, we won't have many slots anyway
 175         struct hppa_isa_iv *iv_next;
 176         */
 177 };
 178
 179 struct mongoose_softc {
 180         device_t sc_dev;
 181         void *sc_ih;
 182
 183         bus_space_tag_t sc_bt;
 184         volatile struct mongoose_regs *sc_regs;
 185         volatile struct mongoose_ctrl *sc_ctrl;
 186         bus_addr_t sc_iomap;
 187
 188         /* interrupts section */
 189         struct hppa_eisa_chipset sc_ec;
 190         struct hppa_isa_chipset sc_ic;
 191         struct hppa_isa_iv sc_iv[MONGOOSE_NINTS];
 192
 193         /* isa/eisa bus guts */
 194         struct hppa_bus_space_tag sc_eiot;
 195         struct hppa_bus_space_tag sc_ememt;
 196         struct hppa_bus_dma_tag sc_edmat;
 197         struct hppa_bus_space_tag sc_iiot;
 198         struct hppa_bus_space_tag sc_imemt;
 199         struct hppa_bus_dma_tag sc_idmat;
 200 };
 201
 202 union mongoose_attach_args {
 203         struct eisabus_attach_args mongoose_eisa;
 204         struct isabus_attach_args mongoose_isa;
 205 };
 206
 207 void mg_eisa_attach_hook(device_t, device_t, struct eisabus_attach_args *);
 208 int mg_intr_map(void *, u_int, eisa_intr_handle_t *);
 209 const char *mg_intr_string(void *, int);
 210 void mg_isa_attach_hook(device_t, device_t, struct isabus_attach_args *);
 211 void mg_isa_detach_hook(isa_chipset_tag_t, device_t);
 212 void *mg_intr_establish(void *, int, int, int, int (*)(void *), void *);
 213 void mg_intr_disestablish(void *, void *);
 214 int mg_intr_check(void *, int, int);
 215 int mg_intr(void *);
 216 int mg_eisa_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 217 int mg_eisa_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 218 void mg_eisa_memunmap(void *, bus_space_handle_t, bus_size_t);
 219 void mg_isa_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
 220 uint16_t mg_isa_r2(void *, bus_space_handle_t, bus_size_t);
 221 uint32_t mg_isa_r4(void *, bus_space_handle_t, bus_size_t);
 222 void mg_isa_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
 223 void mg_isa_w4(void *, bus_space_handle_t, bus_size_t, uint32_t);
 224 void mg_isa_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
 225 void mg_isa_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
 226 void mg_isa_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
 227 void mg_isa_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
 228 void mg_isa_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
 229 void mg_isa_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
 230 void mg_isa_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
 231 void mg_isa_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
 232 void mg_isa_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
 233 void mg_isa_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
 234 void mg_isa_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
 235 void mg_isa_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
 236
 237 int     mgmatch(device_t, cfdata_t, void *);
 238 void    mgattach(device_t, device_t, void *);
 239
 240 CFATTACH_DECL_NEW(mongoose, sizeof(struct mongoose_softc),
 241     mgmatch, mgattach, NULL, NULL);
 242
 243 /* TODO: DMA guts */
 244
 245 void
 246 mg_eisa_attach_hook(device_t parent, device_t self,
 247         struct eisabus_attach_args *mg)
 248 {
 249 }
 250
 251 int
 252 mg_intr_map(void *v, u_int irq, eisa_intr_handle_t *ehp)
 253 {
 254         *ehp = irq;
 255         return 0;
 256 }
 257
 258 const char *
 259 mg_intr_string(void *v, int irq)
 260 {
 261         static char buf[16];
 262
 263         sprintf (buf, "isa irq %d", irq);
 264         return buf;
 265 }
 266
 267 void
 268 mg_isa_attach_hook(device_t parent, device_t self,
 269         struct isabus_attach_args *iba)
 270 {
 271
 272 }
 273
 274 void
 275 mg_isa_detach_hook(isa_chipset_tag_t ic, device_t self)
 276 {
 277
 278 }
 279
 280 void *
 281 mg_intr_establish(void *v, int irq, int type, int pri,
 282         int (*handler)(void *), void *arg)
 283 {
 284         struct hppa_isa_iv *iv;
 285         struct mongoose_softc *sc = v;
 286         volatile uint8_t *imr, *pic;
 287
 288         if (!sc || irq < 0 || irq >= MONGOOSE_NINTS ||
 289             (0 <= irq && irq < MONGOOSE_NINTS && sc->sc_iv[irq].iv_handler))
 290                 return NULL;
 291
 292         if (type != IST_LEVEL && type != IST_EDGE) {
 293                 aprint_debug_dev(sc->sc_dev, "bad interrupt level (%d)\n",
 294                     type);
 295                 return NULL;
 296         }
 297
 298         iv = &sc->sc_iv[irq];
 299         if (iv->iv_handler) {
 300                 aprint_debug_dev(sc->sc_dev, "irq %d already established\n",
 301                     irq);
 302                 return NULL;
 303         }
 304
 305         iv->iv_pri = pri;
 306         iv->iv_handler = handler;
 307         iv->iv_arg = arg;
 308
 309         if (irq < 8) {
 310                 imr = &sc->sc_ctrl->imr0;
 311                 pic = &sc->sc_ctrl->pic0;
 312         } else {
 313                 imr = &sc->sc_ctrl->imr1;
 314                 pic = &sc->sc_ctrl->pic1;
 315                 irq -= 8;
 316         }
 317
 318         *imr |= 1 << irq;
 319         *pic |= (type == IST_LEVEL) << irq;
 320
 321         /* TODO: ack it? */
 322
 323         return iv;
 324 }
 325
 326 void
 327 mg_intr_disestablish(void *v, void *cookie)
 328 {
 329         struct hppa_isa_iv *iv = cookie;
 330         struct mongoose_softc *sc = v;
 331         int irq = iv - sc->sc_iv;
 332         volatile uint8_t *imr;
 333
 334         if (!sc || !cookie)
 335                 return;
 336
 337         if (irq < 8)
 338                 imr = &sc->sc_ctrl->imr0;
 339         else
 340                 imr = &sc->sc_ctrl->imr1;
 341         *imr &= ~(1 << irq);
 342         /* TODO: ack it? */
 343
 344         iv->iv_handler = NULL;
 345 }
 346
 347 int
 348 mg_intr_check(void *v, int irq, int type)
 349 {
 350         return 0;
 351 }
 352
 353 int
 354 mg_intr(void *v)
 355 {
 356         struct mongoose_softc *sc = v;
 357         struct hppa_isa_iv *iv;
 358         int s, irq = 0;
 359
 360         iv = &sc->sc_iv[irq];
 361         s = splraise(imask[iv->iv_pri]);
 362         (iv->iv_handler)(iv->iv_arg);
 363         splx(s);
 364
 365         return 0;
 366 }
 367
 368 int
 369 mg_eisa_iomap(void *v, bus_addr_t addr, bus_size_t size, int cacheable,
 370         bus_space_handle_t *bshp)
 371 {
 372         struct mongoose_softc *sc = v;
 373
 374         /* see if it's ISA space we are mapping */
 375         if (0x100 <= addr && addr < 0x400) {
 376 #define TOISA(a) ((((a) & 0x3f8) << 9) + ((a) & 7))
 377                 size = TOISA(addr + size) - TOISA(addr);
 378                 addr = TOISA(addr);
 379         }
 380
 381         return (sc->sc_bt->hbt_map)(NULL, sc->sc_iomap + addr, size,
 382                                     cacheable, bshp);
 383 }
 384
 385 int
 386 mg_eisa_memmap(void *v, bus_addr_t addr, bus_size_t size, int cacheable,
 387         bus_space_handle_t *bshp)
 388 {
 389         /* TODO: eisa memory map */
 390         return -1;
 391 }
 392
 393 void
 394 mg_eisa_memunmap(void *v, bus_space_handle_t bsh, bus_size_t size)
 395 {
 396         /* TODO: eisa memory unmap */
 397 }
 398
 399 void
 400 mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
 401 {
 402         sync_caches();
 403 }
 404
 405 uint16_t
 406 mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o)
 407 {
 408         uint16_t r = *((volatile uint16_t *)(h + o));
 409
 410         return le16toh(r);
 411 }
 412
 413 uint32_t
 414 mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o)
 415 {
 416         uint32_t r = *((volatile uint32_t *)(h + o));
 417
 418         return le32toh(r);
 419 }
 420
 421 void
 422 mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
 423 {
 424         *((volatile uint16_t *)(h + o)) = htole16(vv);
 425 }
 426
 427 void
 428 mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv)
 429 {
 430         *((volatile uint32_t *)(h + o)) = htole32(vv);
 431 }
 432
 433 void
 434 mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
 435 {
 436         h += o;
 437         while (c--)
 438                 *(a++) = le16toh(*(volatile uint16_t *)h);
 439 }
 440
 441 void
 442 mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
 443 {
 444         h += o;
 445         while (c--)
 446                 *(a++) = le32toh(*(volatile uint32_t *)h);
 447 }
 448
 449 void
 450 mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
 451 {
 452         uint16_t r;
 453
 454         h += o;
 455         while (c--) {
 456                 r = *(a++);
 457                 *(volatile uint16_t *)h = htole16(r);
 458         }
 459 }
 460
 461 void
 462 mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
 463 {
 464         uint32_t r;
 465
 466         h += o;
 467         while (c--) {
 468                 r = *(a++);
 469                 *(volatile uint32_t *)h = htole32(r);
 470         }
 471 }
 472
 473 void
 474 mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
 475 {
 476         vv = htole16(vv);
 477         h += o;
 478         while (c--)
 479                 *(volatile uint16_t *)h = vv;
 480 }
 481
 482 void
 483 mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
 484 {
 485         vv = htole32(vv);
 486         h += o;
 487         while (c--)
 488                 *(volatile uint32_t *)h = vv;
 489 }
 490
 491 void
 492 mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
 493 {
 494         uint16_t r;
 495         volatile uint16_t *p;
 496
 497         h += o;
 498         p = (void *)h;
 499         while (c--) {
 500                 r = *p++;
 501                 *a++ = le16toh(r);
 502         }
 503 }
 504
 505 void
 506 mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
 507 {
 508         uint32_t r;
 509         volatile uint32_t *p;
 510
 511         h += o;
 512         p = (void *)h;
 513         while (c--) {
 514                 r = *p++;
 515                 *a++ = le32toh(r);
 516         }
 517 }
 518
 519 void
 520 mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
 521 {
 522         uint16_t r;
 523         volatile uint16_t *p;
 524
 525         h += o;
 526         p = (void *)h;
 527         while (c--) {
 528                 r = *a++;
 529                 *p++ = htole16(r);
 530         }
 531 }
 532
 533 void
 534 mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
 535 {
 536         uint32_t r;
 537         volatile uint32_t *p;
 538
 539         h += o;
 540         p = (void *)h;
 541         while (c--) {
 542                 r = *a++;
 543                 *p++ = htole32(r);
 544         }
 545 }
 546
 547 void
 548 mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
 549 {
 550         volatile uint16_t *p;
 551
 552         vv = htole16(vv);
 553         h += o;
 554         p = (void *)h;
 555         while (c--)
 556                 *p++ = vv;
 557 }
 558
 559 void
 560 mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
 561 {
 562         volatile uint32_t *p;
 563
 564         vv = htole32(vv);
 565         h += o;
 566         p = (void *)h;
 567         while (c--)
 568                 *p++ = vv;
 569 }
 570
 571 int
 572 mgmatch(device_t parent, cfdata_t cf, void *aux)
 573 {
 574         struct confargs *ca = aux;
 575         bus_space_handle_t ioh;
 576
 577         if (ca->ca_type.iodc_type != HPPA_TYPE_BHA ||
 578             ca->ca_type.iodc_sv_model != HPPA_BHA_EISA)
 579                 return 0;
 580
 581         if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
 582                           sizeof(struct mongoose_regs), 0, &ioh))
 583                 return 0;
 584
 585         /* XXX check EISA signature */
 586
 587         bus_space_unmap(ca->ca_iot, ioh, sizeof(struct mongoose_regs));
 588
 589         return 1;
 590 }
 591
 592 void
 593 mgattach(device_t parent, device_t self, void *aux)
 594 {
 595         struct confargs *ca = aux;
 596         struct mongoose_softc *sc = device_private(self);
 597         struct hppa_bus_space_tag *bt;
 598         union mongoose_attach_args ea;
 599         char brid[EISA_IDSTRINGLEN];
 600         bus_space_handle_t ioh;
 601
 602         sc->sc_dev = self;
 603         sc->sc_bt = ca->ca_iot;
 604         sc->sc_iomap = ca->ca_hpa;
 605         if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_MONGOOSE,
 606                           sizeof(struct mongoose_regs), 0, &ioh))
 607                 panic("mgattach: can't map registers");
 608         sc->sc_regs = (struct mongoose_regs *)ioh;
 609         if (bus_space_map(ca->ca_iot, ca->ca_hpa + MONGOOSE_CTRL,
 610                           sizeof(struct mongoose_ctrl), 0, &ioh))
 611                 panic("mgattach: can't map control registers");
 612         sc->sc_ctrl = (struct mongoose_ctrl *)ioh;
 613
 614         viper_eisa_en();
 615
 616         /* BUS RESET */
 617         sc->sc_ctrl->nmi_ext = MONGOOSE_NMI_BUSRESET;
 618         DELAY(1);
 619         sc->sc_ctrl->nmi_ext = 0;
 620         DELAY(100);
 621
 622         /* determine eisa board id */
 623         {
 624                 uint8_t id[4], *p;
 625                 /* XXX this is awful */
 626                 p = (uint8_t *)(ioh + EISA_SLOTOFF_VID);
 627                 id[0] = *p++;
 628                 id[1] = *p++;
 629                 id[2] = *p++;
 630                 id[3] = *p++;
 631
 632                 brid[0] = EISA_VENDID_0(id);
 633                 brid[1] = EISA_VENDID_1(id);
 634                 brid[2] = EISA_VENDID_2(id);
 635                 brid[3] = EISA_PRODID_0(id + 2);
 636                 brid[4] = EISA_PRODID_1(id + 2);
 637                 brid[5] = EISA_PRODID_2(id + 2);
 638                 brid[6] = EISA_PRODID_3(id + 2);
 639                 brid[7] = '\0';
 640         }
 641
 642         aprint_normal(": %s rev %d, %d MHz\n", brid, sc->sc_regs->version,
 643             (sc->sc_regs->clock? 33 : 25));
 644         sc->sc_regs->liowait = 1;       /* disable isa wait states */
 645         sc->sc_regs->lock    = 1;       /* bus unlock */
 646
 647         /* attach EISA */
 648         sc->sc_ec.ec_v = sc;
 649         sc->sc_ec.ec_attach_hook = mg_eisa_attach_hook;
 650         sc->sc_ec.ec_intr_establish = mg_intr_establish;
 651         sc->sc_ec.ec_intr_disestablish = mg_intr_disestablish;
 652         sc->sc_ec.ec_intr_string = mg_intr_string;
 653         sc->sc_ec.ec_intr_map = mg_intr_map;
 654
 655         /* inherit the bus tags for eisa from the mainbus */
 656         bt = &sc->sc_eiot;
 657         memcpy(bt, ca->ca_iot, sizeof(*bt));
 658         bt->hbt_cookie = sc;
 659         bt->hbt_map = mg_eisa_iomap;
 660 #define R(n)    bt->__CONCAT(hbt_,n) = &__CONCAT(mg_isa_,n)
 661         /* R(barrier); */
 662         R(r2); R(r4); R(w2); R(w4);
 663         R(rm_2);R(rm_4);R(wm_2);R(wm_4);R(sm_2);R(sm_4);
 664         R(rr_2);R(rr_4);R(wr_2);R(wr_4);R(sr_2);R(sr_4);
 665
 666         bt = &sc->sc_ememt;
 667         memcpy(bt, ca->ca_iot, sizeof(*bt));
 668         bt->hbt_cookie = sc;
 669         bt->hbt_map = mg_eisa_memmap;
 670         bt->hbt_unmap = mg_eisa_memunmap;
 671
 672         /* attachment guts */
 673         ea.mongoose_eisa.eba_iot = &sc->sc_eiot;
 674         ea.mongoose_eisa.eba_memt = &sc->sc_ememt;
 675         ea.mongoose_eisa.eba_dmat = NULL /* &sc->sc_edmat */;
 676         ea.mongoose_eisa.eba_ec = &sc->sc_ec;
 677         config_found_ia(self, "eisabus", &ea.mongoose_eisa, eisabusprint);
 678
 679         sc->sc_ic.ic_v = sc;
 680         sc->sc_ic.ic_attach_hook = mg_isa_attach_hook;
 681         sc->sc_ic.ic_detach_hook = mg_isa_detach_hook;
 682         sc->sc_ic.ic_intr_establish = mg_intr_establish;
 683         sc->sc_ic.ic_intr_disestablish = mg_intr_disestablish;
 684         sc->sc_ic.ic_intr_check = mg_intr_check;
 685
 686         /* inherit the bus tags for isa from the eisa */
 687         bt = &sc->sc_imemt;
 688         memcpy(bt, &sc->sc_ememt, sizeof(*bt));
 689         bt = &sc->sc_iiot;
 690         memcpy(bt, &sc->sc_eiot, sizeof(*bt));
 691
 692         /* TODO: DMA tags */
 693
 694         /* attachment guts */
 695         ea.mongoose_isa.iba_iot = &sc->sc_iiot;
 696         ea.mongoose_isa.iba_memt = &sc->sc_imemt;
 697 #if NISADMA > 0
 698         ea.mongoose_isa.iba_dmat = &sc->sc_idmat;
 699 #endif
 700         ea.mongoose_isa.iba_ic = &sc->sc_ic;
 701         config_found_ia(self, "isabus", &ea.mongoose_isa, isabusprint);
 702 #undef  R
 703
 704         /* attach interrupt */
 705         sc->sc_ih = hp700_intr_establish(sc->sc_dev, IPL_NONE, mg_intr, sc,
 706             &int_reg_cpu, ca->ca_irq);
 707 }