sys/arch/hpc/stand/hpcboot/arm/arm_mmu.h

   1 /* -*-C++-*-    $NetBSD: arm_mmu.h,v 1.3 2005/12/11 12:17:28 christos Exp $     */
   2
   3 /*-
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by UCHIYAMA Yasushi.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #ifndef _HPCBOOT_ARM_MMU_H_
  33 #define _HPCBOOT_ARM_MMU_H_
  34
  35 #include <arm/arm_arch.h>
  36 #include <memory.h>
  37
  38 #define ARM_MMU_TABLEBASE_MASK                          0xffffc000
  39 #define ARM_MMU_TABLEINDEX_MASK                         0x00003ffc
  40 #define ARM_MMU_VADDR_TABLE_INDEX_MASK                  0xfff00000
  41 #define ARM_MMU_TABLEINDEX_SHIFT                        18
  42 #define ARM_MMU_TABLEINDEX(x)                                           \
  43         ((((x) & ARM_MMU_VADDR_TABLE_INDEX_MASK) >>                     \
  44          ARM_MMU_TABLEINDEX_SHIFT) & ARM_MMU_TABLEINDEX_MASK)
  45
  46 /*
  47  * 1st level descriptor
  48  */
  49 #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK          0x3
  50 #define ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE(x)                            \
  51         ((x) & ARM_MMU_LEVEL1DESC_TRANSLATE_TYPE_MASK)
  52 #define ARM_MMU_LEVEL1DESC_TRANSLATE_SECTION            0x2
  53 #define ARM_MMU_LEVEL1DESC_TRANSLATE_PAGE               0x1
  54
  55 /*
  56  * Section translation
  57  */
  58 #define ARM_MMU_SECTION_BASE_MASK                       0xfff00000
  59 #define ARM_MMU_SECTION_BASE(x)                                         \
  60         ((x) & ARM_MMU_SECTION_BASE_MASK)
  61 #define ARM_MMU_VADDR_SECTION_INDEX_MASK                0x000fffff
  62 #define ARM_MMU_VADDR_SECTION_INDEX(x)                                  \
  63         ((x) & ARM_MMU_VADDR_SECTION_INDEX_MASK)
  64 /*
  65  * Page translation
  66  */
  67 #define ARM_MMU_PTE_BASE_MASK                           0xfffffc00
  68 #define ARM_MMU_PTE_BASE(x)     ((x) & ARM_MMU_PTE_BASE_MASK)
  69 #define ARM_MMU_VADDR_PTE_INDEX_MASK                    0x000003fc
  70 #define ARM_MMU_VADDR_PTE_INDEX_SHIFT                   10
  71 #define ARM_MMU_VADDR_PTE_INDEX(x)                                      \
  72         (((x) >> ARM_MMU_VADDR_PTE_INDEX_SHIFT) &                       \
  73         ARM_MMU_VADDR_PTE_INDEX_MASK)
  74
  75 class MemoryManager_ArmMMU : public MemoryManager {
  76 private:
  77         BOOL _kmode;
  78         paddr_t _table_base;
  79
  80 public:
  81         MemoryManager_ArmMMU(Console *&, size_t);
  82         virtual ~MemoryManager_ArmMMU();
  83         BOOL init(void);
  84         paddr_t searchPage(vaddr_t vaddr);
  85 };
  86
  87 #endif // _HPCBOOT_ARM_MMU_H_