| blob | b3d30e8f537c20d3f51eba2656cf58a05d3efc47 |
1 /* $NetBSD: ipaq_gpioreg.h,v 1.5 2001/07/15 20:19:31 ichiro Exp $ */
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Ichiro FUKUHARA (ichiro@ichiro.org).
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
31 /*
32 * iPAQ H3600 specific parameter
33 */
34 /*
35 port I/O(Active) name desc
36 0 I(L) PWR_ON# button detect: power-on
37 1 I(L) IP_IRQ# cpu-interrupt
38 2...9 O LDD{8..15} LCD DATA(8-15)
39 10 I(L) CARD_IND1# PCMCIA Socket1 inserted detection
40 11 I(L) CARD_IRQ1# PCMCIA slot1 IRQ
41 12 O CLK_SET0 clock select 0 for audio codec
42 13 O CLK_SET1 clock select 1 for audio codec
43 14 I/O L3_SDA UDA1341 L3DATA
44 15 O L3_MODE UDA1341 L3MODE
45 16 O L3_SCLK UDA1341 L3SCLK
46 17 I(L) CARD_IND0# PCMCIA Socket0 inserted detection
47 18 I(L) KEY_ACT# button detect: center button
48 19 I SYS_CLK Stereo audio codev external clock
49 20 I(H) BAT_FAULT Battery fault
50 21 I(L) CARD_IRQ0# PCMCIA slot0 IRQ
51 22 I(L) LOCK# expansion pack lock/unlock signal
52 23 I(H) COM_DCD RS-232 DCD
53 24 I(H) OPT_IRQ expansion pach shared IRQ
54 25 I(H) COM_CTS RS-232 CTS
55 26 O(H) COM_RTS RS-232 RTS
56 27 O(L) OPT_DETECT# Indicates presence of expansion pack inserted
58 Extended GPIO
59 0 O(H) VPEN Enables programming and erasing of Flash
60 1 O(H) CARD_RESET CF/PCMCIA card reset signal
61 2 O(H) OPT_RESET Expansion pack reset signal
62 3 O(L) CODEC_RESET# onboard codec reset signal
63 4 O(H) OPT_NVRAM_ON Enables power supply to the NVRAM of the
64 Expansion pack.(=OPT_ON)
65 5 O(H) OPT_ON Enables full power supply to the Expansion pack.
66 6 O(H) LCD_ON Enables LCD 3.3V power supply
67 7 O(H) RS232_ON Enables RS232
68 8 O(H) LCD_PCI Enables power to LCD control IC
69 9 O(H) IR_ON Enables power to IR module
70 10 O(H) AUD_ON Enables power to audio output amp.
71 11 O(H) AUD_PWR_ON Enables power to all audio modules.
72 12 O(H) QMUTE Mutes yhe onboard audio codec
73 13 O IR_FSEL FIR mode selection:H=FIR,L=SIR
74 14 O(H) LCD_5V_ON Enables 5V to the LCD module
75 15 O(H) LVDD_ON Enables 9V and -6.5V to the LCD module
76 */
78 #define GPIO_H3600_POWER_BUTTON GPIO (0)
79 #define GPIO_H3600_CLK_SET0 GPIO (12)
80 #define GPIO_H3600_CLK_SET1 GPIO (13)
81 #define GPIO_H3600_PCMCIA_CD0 GPIO (17)
82 #define GPIO_H3600_PCMCIA_CD1 GPIO (10)
83 #define GPIO_H3600_PCMCIA_IRQ0 GPIO (21)
84 #define GPIO_H3600_PCMCIA_IRQ1 GPIO (11)
85 #define GPIO_H3600_L3_DATA GPIO (14)
86 #define GPIO_H3600_L3_MODE GPIO (15)
87 #define GPIO_H3600_L3_CLK GPIO (16)
88 #define GPIO_H3600_OPT_LOCK GPIO (22)
89 #define GPIO_H3600_OPT_IRQ GPIO (24)
90 #define GPIO_H3600_OPT_DETECT GPIO (27)
92 #define EGPIO_H3600_VPEN GPIO (0)
93 #define EGPIO_H3600_CARD_RESET GPIO (1)
94 #define EGPIO_H3600_OPT_RESET GPIO (2)
95 #define EGPIO_H3600_CODEC_RESET GPIO (3)
96 #define EGPIO_H3600_OPT_NVRAM_ON GPIO (4)
97 #define EGPIO_H3600_OPT_ON GPIO (5)
98 #define EGPIO_H3600_LCD33_ON GPIO (6)
99 #define EGPIO_H3600_RS232_ON GPIO (7)
100 #define EGPIO_H3600_LCD_PCI GPIO (8)
101 #define EGPIO_H3600_IR_ON GPIO (9)
102 #define EGPIO_H3600_AUD_ON GPIO (10)
103 #define EGPIO_H3600_AUD_PWRON GPIO (11)
104 #define EGPIO_H3600_QMUTE GPIO (12)
105 #define EGPIO_H3600_IR_FSEL GPIO (13)
106 #define EGPIO_H3600_LCD5_ON GPIO (14)
107 #define EGPIO_H3600_LVDD_ON GPIO (15)
109 #define EGPIO_INIT EGPIO_H3600_RS232_ON| \
110 EGPIO_H3600_AUD_PWRON| \
111 EGPIO_H3600_QMUTE| \
112 EGPIO_H3600_AUD_ON
114 #define EGPIO_LCD_INIT EGPIO_H3600_LCD33_ON| \
115 EGPIO_H3600_LCD_PCI| \
116 EGPIO_H3600_LCD5_ON| \
117 EGPIO_H3600_LVDD_ON