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[netbsd-mini2440.git] / sys / arch / hpcmips / dev / ucb1200reg.h
blobb4c454fd5cfbd557d51d63a5dd204178a68a3f69
1 /* $NetBSD: ucb1200reg.h,v 1.7 2001/09/15 12:47:08 uch Exp $ */
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * PHILIPS UCB1200 Advanced modem/audio analog front-end
36 /* Internal register. access via SIB */
37 #define UCB1200_IO_DATA_REG 0
38 #define UCB1200_IO_DIR_REG 1
39 #define UCB1200_POSINTEN_REG 2
40 #define UCB1200_NEGINTEN_REG 3
41 #define UCB1200_INTSTAT_REG 4
42 #define UCB1200_TELECOMCTRLA_REG 5
43 #define UCB1200_TELECOMCTRLB_REG 6
44 #define UCB1200_AUDIOCTRLA_REG 7
45 #define UCB1200_AUDIOCTRLB_REG 8
46 #define UCB1200_TSCTRL_REG 9
47 #define UCB1200_ADCCTRL_REG 10
48 #define UCB1200_ADCDATA_REG 11
49 #define UCB1200_ID_REG 12
50 #define UCB1200_MODE_REG 13
51 #define UCB1200_RESERVED_REG 14
52 #define UCB1200_NULL_REG 15 /* always returns 0xffff */
55 * I/O port data register
57 #define UCB1200_IOPORT_MAX 10
58 #define UCB1200_IO_DATA_SPEAKER 0x100 /* XXX general? */
61 * Telecom control register A
63 #define UCB1200_TELECOMCTRLA_DIV_MIN 16
64 #define UCB1200_TELECOMCTRLA_DIV_MAX 127
65 #define UCB1200_TELECOMCTRLA_DIV_SHIFT 0
66 #define UCB1200_TELECOMCTRLA_DIV_MASK 0x7f
67 #define UCB1200_TELECOMCTRLA_DIV(cr) \
68 (((cr) >> UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
69 UCB1200_TELECOMCTRLA_DIV_MASK)
70 #define UCB1200_TELECOMCTRLA_DIV_SET(cr, val) \
71 ((cr) | (((val) << UCB1200_TELECOMCTRLA_DIV_SHIFT) & \
72 (UCB1200_TELECOMCTRLA_DIV_MASK << UCB1200_TELECOMCTRLA_DIV_SHIFT)))
74 #define UCB1200_TELECOMCTRLA_LOOP 0x0080
77 * Telecom control register B
79 #define UCB1200_TELECOMCTRLB_VBF 0x0008
80 #define UCB1200_TELECOMCTRLB_CLIPSTATCLR 0x0010
81 #define UCB1200_TELECOMCTRLB_ATT 0x0040
82 #define UCB1200_TELECOMCTRLB_STS 0x0800
83 #define UCB1200_TELECOMCTRLB_MUTE 0x2000
84 #define UCB1200_TELECOMCTRLB_INEN 0x4000
85 #define UCB1200_TELECOMCTRLB_OUTEN 0x8000
88 * Audio control register A
90 #define UCB1200_AUDIOCTRLA_DIV_MIN 6
91 #define UCB1200_AUDIOCTRLA_DIV_MAX 127
92 #define UCB1200_AUDIOCTRLA_DIV_SHIFT 0
93 #define UCB1200_AUDIOCTRLA_DIV_MASK 0x7f
94 #define UCB1200_AUDIOCTRLA_DIV(cr) \
95 (((cr) >> UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
96 UCB1200_AUDIOCTRLA_DIV_MASK)
97 #define UCB1200_AUDIOCTRLA_DIV_SET(cr, val) \
98 ((cr) | (((val) << UCB1200_AUDIOCTRLA_DIV_SHIFT) & \
99 (UCB1200_AUDIOCTRLA_DIV_MASK << UCB1200_AUDIOCTRLA_DIV_SHIFT)))
101 #define UCB1200_AUDIOCTRLA_GAIN_SHIFT 7
102 #define UCB1200_AUDIOCTRLA_GAIN_MASK 0x1f
103 #define UCB1200_AUDIOCTRLA_GAIN(cr) \
104 (((cr) >> UCB1200_AUDIOCTRLA_GAIN_SHIFT) & \
105 UCB1200_AUDIOCTRLA_GAIN_MASK)
106 #define UCB1200_AUDIOCTRLA_GAIN_SET(cr, val) \
107 ((cr) | (((val) << UCB1200_AUDIOCTRLA_GAIN_SHIFT) & \
108 (UCB1200_AUDIOCTRLA_GAIN_MASK << UCB1200_AUDIOCTRLA_GAIN_SHIFT)))
111 * Audio control register B
113 #define UCB1200_AUDIOCTRLB_ATT_MIN 0
114 #define UCB1200_AUDIOCTRLB_ATT_MAX 0x1f
115 #define UCB1200_AUDIOCTRLB_ATT_SHIFT 0
116 #define UCB1200_AUDIOCTRLB_ATT_MASK 0x1f
117 #define UCB1200_AUDIOCTRLB_ATT(cr) \
118 (((cr) >> UCB1200_AUDIOCTRLB_ATT_SHIFT) & \
119 UCB1200_AUDIOCTRLB_ATT_MASK)
120 #define UCB1200_AUDIOCTRLB_ATT_CLR(cr) \
121 ((cr) & ~(UCB1200_AUDIOCTRLB_ATT_MASK << \
122 UCB1200_AUDIOCTRLB_ATT_SHIFT))
123 #define UCB1200_AUDIOCTRLB_ATT_SET(cr, val) \
124 ((cr) | (((val) << UCB1200_AUDIOCTRLB_ATT_SHIFT) & \
125 (UCB1200_AUDIOCTRLB_ATT_MASK << UCB1200_AUDIOCTRLB_ATT_SHIFT)))
127 #define UCB1200_AUDIOCTRLB_CLIPSTATCLR 0x0040
128 #define UCB1200_AUDIOCTRLB_LOOP 0x0100
129 #define UCB1200_AUDIOCTRLB_MUTE 0x2000
130 #define UCB1200_AUDIOCTRLB_INEN 0x4000
131 #define UCB1200_AUDIOCTRLB_OUTEN 0x8000
134 * Touch screen control register
136 #define UCB1200_TSCTRL_MXLOW 0x00002000
137 #define UCB1200_TSCTRL_PXLOW 0x00001000
138 #define UCB1200_TSCTRL_BIAS 0x00000800
140 #define UCB1200_TSCTRL_MODE_SHIFT 8
141 #define UCB1200_TSCTRL_MODE_MASK 0x7f
142 #define UCB1200_TSCTRL_MODE(cr) \
143 (((cr) >> UCB1200_TSCTRL_MODE_SHIFT) & \
144 UCB1200_TSCTRL_MODE_MASK)
145 #define UCB1200_TSCTRL_MODE_INTERRUPT 0
146 #define UCB1200_TSCTRL_MODE_PRESSURE (1 << UCB1200_TSCTRL_MODE_SHIFT)
147 #define UCB1200_TSCTRL_MODE_POSITION0 (2 << UCB1200_TSCTRL_MODE_SHIFT)
148 #define UCB1200_TSCTRL_MODE_POSITION1 (3 << UCB1200_TSCTRL_MODE_SHIFT)
150 #define UCB1200_TSCTRL_PYGND 0x00000080
151 #define UCB1200_TSCTRL_MYGND 0x00000040
152 #define UCB1200_TSCTRL_PXGND 0x00000020
153 #define UCB1200_TSCTRL_MXGND 0x00000010
154 #define UCB1200_TSCTRL_PYPWR 0x00000008
155 #define UCB1200_TSCTRL_MYPWR 0x00000004
156 #define UCB1200_TSCTRL_PXPWR 0x00000002
157 #define UCB1200_TSCTRL_MXPWR 0x00000001
159 /* touch screen modes */
160 #define UCB1200_TSCTRL_YPOSITION \
161 (UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXGND | \
162 UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
163 #define UCB1200_TSCTRL_XPOSITION \
164 (UCB1200_TSCTRL_PYPWR | UCB1200_TSCTRL_MYGND | \
165 UCB1200_TSCTRL_MODE_POSITION0 | UCB1200_TSCTRL_BIAS)
166 #define UCB1200_TSCTRL_PRESSURE \
167 (UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR | \
168 UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND | \
169 UCB1200_TSCTRL_MODE_PRESSURE | UCB1200_TSCTRL_BIAS)
171 #define UCB1200_TSCTRL_INTERRUPT \
172 (UCB1200_TSCTRL_PXPWR | UCB1200_TSCTRL_MXPWR | \
173 UCB1200_TSCTRL_PYGND | UCB1200_TSCTRL_MYGND | \
174 UCB1200_TSCTRL_MODE_INTERRUPT)
176 #define UCB1200_TSCTRL_PRESSURE1
177 #define UCB1200_TSCTRL_PRESSURE2
178 #define UCB1200_TSCTRL_PRESSURE3
179 #define UCB1200_TSCTRL_PRESSURE4
180 #define UCB1200_TSCTRL_PRESSURE5
181 #define UCB1200_TSCTRL_XRESISTANCE
182 #define UCB1200_TSCTRL_YRESISTANCE
185 * ADC control register
187 #define UCB1200_ADCCTRL_ENABLE 0x8000
188 #define UCB1200_ADCCTRL_START 0x0080
189 #define UCB1200_ADCCTRL_EXTREF 0x0020
191 #define UCB1200_ADCCTRL_INPUT_SHIFT 2
192 #define UCB1200_ADCCTRL_INPUT_MASK 0x7
193 #define UCB1200_ADCCTRL_INPUT_SET(cr, val) \
194 ((cr) | (((val) << UCB1200_ADCCTRL_INPUT_SHIFT) & \
195 (UCB1200_ADCCTRL_INPUT_MASK << UCB1200_ADCCTRL_INPUT_SHIFT)))
196 #define UCB1200_ADCCTRL_INPUT_TSPX 0x0
197 #define UCB1200_ADCCTRL_INPUT_TSMX 0x1
198 #define UCB1200_ADCCTRL_INPUT_TSPY 0x2
199 #define UCB1200_ADCCTRL_INPUT_TSMY 0x3
200 #define UCB1200_ADCCTRL_INPUT_AD0 0x4
201 #define UCB1200_ADCCTRL_INPUT_AD1 0x5
202 #define UCB1200_ADCCTRL_INPUT_AD2 0x6
203 #define UCB1200_ADCCTRL_INPUT_AD3 0x7
205 #define UCB1200_ADCCTRL_VREFBYP 0x0002
206 #define UCB1200_ADCCTRL_SYNCMODE 0x0001
209 * ADC data register
211 #define UCB1200_ADCDATA_INPROGRESS 0x8000
213 #define UCB1200_ADCDATA_SHIFT 5
214 #define UCB1200_ADCDATA_MASK 0x3ff
215 #define UCB1200_ADCDATA(cr) \
216 (((cr) >> UCB1200_ADCDATA_SHIFT) & \
217 UCB1200_ADCDATA_MASK)
220 * ID register
222 /* PHILIPS products */
223 /* Version 3, Device 0, Supplier 1 */
224 #define UCB1100_ID 0x1003
225 /* Version 4, Device 0, Supplier 1 */
226 #define UCB1200_ID 0x1004
227 /* Version 10, Device 0, Supplier 1 */
228 #define UCB1300_ID 0x100a
229 /* TOSHIBA TC35413F */
230 #define TC35413F_ID 0x9712