No empty .Rs/.Re
[netbsd-mini2440.git] / sys / arch / hpcmips / isa / isa_machdep.c
blob075d5a2969a97050b9e9c4781e0d165c565611f4
1 /* $NetBSD: isa_machdep.c,v 1.37 2009/08/18 17:02:00 dyoung Exp $ */
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: isa_machdep.c,v 1.37 2009/08/18 17:02:00 dyoung Exp $");
35 #include "opt_vr41xx.h"
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/reboot.h>
40 #include <sys/device.h>
42 #include <dev/isa/isavar.h>
43 #include <dev/isa/isareg.h>
45 #include <machine/platid.h>
46 #include <machine/platid_mask.h>
47 #include <machine/bus.h>
48 #include <machine/bus_space_hpcmips.h>
49 #include <machine/debug.h>
51 #include <dev/hpc/hpciovar.h>
53 #include <hpcmips/vr/vripif.h>
55 #include "locators.h"
57 #define VRISADEBUG
59 #ifdef VRISADEBUG
60 #ifndef VRISADEBUG_CONF
61 #define VRISADEBUG_CONF 0
62 #endif /* VRISADEBUG_CONF */
63 int vrisa_debug = VRISADEBUG_CONF;
64 #define DPRINTF(arg) if (vrisa_debug) printf arg;
65 #define DBITDISP(mask) if (vrisa_debug) dbg_bit_print(mask);
66 #define VPRINTF(arg) if (bootverbose || vrisa_debug) printf arg;
67 #else /* VRISADEBUG */
68 #define DPRINTF(arg)
69 #define DBITDISP(mask)
70 #define VPRINTF(arg) if (bootverbose) printf arg;
71 #endif /* VRISADEBUG */
74 * intrrupt no. encoding:
76 * 0x0000000f ISA IRQ#
77 * 0x00ff0000 GPIO port#
78 * 0x01000000 interrupt signal hold/through (1:hold/0:though)
79 * 0x02000000 interrupt detection level (1:low /0:high )
80 * 0x04000000 interrupt detection trigger (1:edge/0:level )
82 #define INTR_IRQ(i) (((i)>> 0) & 0x0f)
83 #define INTR_PORT(i) (((i)>>16) & 0xff)
84 #define INTR_MODE(i) (((i)>>24) & 0x07)
85 #define INTR_NIRQS 16
87 int vrisabprint(void *, const char *);
88 int vrisabmatch(struct device *, struct cfdata *, void *);
89 void vrisabattach(struct device *, struct device *, void *);
91 struct vrisab_softc {
92 struct device sc_dev;
93 hpcio_chip_t sc_hc;
94 int sc_intr_map[INTR_NIRQS]; /* ISA <-> GIU inerrupt line mapping */
95 struct hpcmips_isa_chipset sc_isa_ic;
98 CFATTACH_DECL(vrisab, sizeof(struct vrisab_softc),
99 vrisabmatch, vrisabattach, NULL, NULL);
101 #ifdef DEBUG_FIND_PCIC
102 #include <mips/cpuregs.h>
103 #warning DEBUG_FIND_PCIC
104 static void __find_pcic(void);
105 #endif
107 #ifdef DEBUG_FIND_COMPORT
108 #include <mips/cpuregs.h>
109 #include <dev/ic/ns16550reg.h>
110 #include <dev/ic/comreg.h>
111 #warning DEBUG_FIND_COMPORT
112 static void __find_comport(void);
113 #endif
116 vrisabmatch(struct device *parent, struct cfdata *match, void *aux)
118 struct hpcio_attach_args *haa = aux;
119 platid_mask_t mask;
120 int n;
122 if (strcmp(haa->haa_busname, match->cf_name))
123 return (0);
125 if (match->cf_loc[HPCIOIFCF_PLATFORM] == HPCIOIFCF_PLATFORM_DEFAULT)
126 return (1);
128 mask = PLATID_DEREF(match->cf_loc[HPCIOIFCF_PLATFORM]);
129 if ((n = platid_match(&platid, &mask)) != 0)
130 return (n + 2);
132 return (0);
135 void
136 vrisabattach(struct device *parent, struct device *self, void *aux)
138 struct hpcio_attach_args *haa = aux;
139 struct vrisab_softc *sc = (void*)self;
140 struct isabus_attach_args iba;
141 struct bus_space_tag_hpcmips *iot, *memt;
142 bus_addr_t offset;
143 int i;
145 sc->sc_hc = (*haa->haa_getchip)(haa->haa_sc, VRIP_IOCHIP_VRGIU);
146 sc->sc_isa_ic.ic_sc = sc;
148 iba.iba_ic = &sc->sc_isa_ic;
149 iba.iba_dmat = 0; /* XXX not yet */
151 /* Allocate ISA memory space */
152 memt = hpcmips_alloc_bus_space_tag();
153 offset = device_cfdata(&sc->sc_dev)->cf_loc[VRISABIFCF_ISAMEMOFFSET];
154 hpcmips_init_bus_space(memt,
155 (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA mem",
156 VR_ISA_MEM_BASE + offset, VR_ISA_MEM_SIZE - offset);
157 iba.iba_memt = &memt->bst;
159 /* Allocate ISA port space */
160 iot = hpcmips_alloc_bus_space_tag();
161 offset = device_cfdata(&sc->sc_dev)->cf_loc[VRISABIFCF_ISAPORTOFFSET];
162 hpcmips_init_bus_space(iot,
163 (struct bus_space_tag_hpcmips *)haa->haa_iot, "ISA port",
164 VR_ISA_PORT_BASE + offset, VR_ISA_PORT_SIZE - offset);
165 iba.iba_iot = &iot->bst;
167 #ifdef DEBUG_FIND_PCIC
168 #warning DEBUG_FIND_PCIC
169 __find_pcic();
170 #else
171 /* Initialize ISA IRQ <-> GPIO mapping */
172 for (i = 0; i < INTR_NIRQS; i++)
173 sc->sc_intr_map[i] = -1;
174 printf(": ISA port %#x-%#x mem %#x-%#x\n",
175 iot->base, iot->base + iot->size,
176 memt->base, memt->base + memt->size);
177 config_found_ia(self, "isabus", &iba, vrisabprint);
178 #endif
180 #ifdef DEBUG_FIND_COMPORT
181 #warning DEBUG_FIND_COMPORT
182 __find_comport();
183 #endif
187 vrisabprint(void *aux, const char *pnp)
189 if (pnp)
190 return (QUIET);
192 return (UNCONF);
195 void
196 isa_attach_hook(struct device *parent, struct device *self,
197 struct isabus_attach_args *iba)
202 void
203 isa_detach_hook(isa_chipset_tag_t ic, device_t self)
207 const struct evcnt *
208 isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
211 /* XXX for now, no evcnt parent reported */
212 return (NULL);
215 void *
216 isa_intr_establish(isa_chipset_tag_t ic, int intr, int type, int level,
217 int (*ih_fun)(void*), void *ih_arg)
219 struct vrisab_softc *sc = ic->ic_sc;
220 int port, irq, mode;
222 static int intr_modes[8] = {
223 HPCIO_INTR_LEVEL_HIGH_THROUGH,
224 HPCIO_INTR_LEVEL_HIGH_HOLD,
225 HPCIO_INTR_LEVEL_LOW_THROUGH,
226 HPCIO_INTR_LEVEL_LOW_HOLD,
227 HPCIO_INTR_EDGE_THROUGH,
228 HPCIO_INTR_EDGE_HOLD,
229 HPCIO_INTR_EDGE_THROUGH,
230 HPCIO_INTR_EDGE_HOLD,
232 #ifdef VRISADEBUG
233 static const char* intr_mode_names[8] = {
234 "level high through",
235 "level high hold",
236 "level low through",
237 "level low hold",
238 "edge through",
239 "edge hold",
240 "edge through",
241 "edge hold",
243 #endif /* VRISADEBUG */
245 * ISA IRQ <-> GPIO port mapping
247 irq = INTR_IRQ(intr);
248 if (sc->sc_intr_map[irq] != -1) {
249 /* already mapped */
250 intr = sc->sc_intr_map[irq];
251 } else {
252 /* not mapped yet */
253 sc->sc_intr_map[irq] = intr; /* Register it */
255 mode = INTR_MODE(intr);
256 port = INTR_PORT(intr);
258 VPRINTF(("ISA IRQ %d -> %s port %d, %s\n",
259 irq, sc->sc_hc->hc_name, port, intr_mode_names[mode]));
261 /* Call Vr routine */
262 return (hpcio_intr_establish(sc->sc_hc, port, intr_modes[mode],
263 ih_fun, ih_arg));
266 void
267 isa_intr_disestablish(isa_chipset_tag_t ic, void *arg)
269 struct vrisab_softc *sc = ic->ic_sc;
270 /* Call Vr routine */
271 hpcio_intr_disestablish(sc->sc_hc, arg);
275 isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq)
277 /* XXX not coded yet. this is temporary XXX */
278 DPRINTF(("isa_intr_alloc:"));
279 DBITDISP(mask);
280 *irq = (ffs(mask) -1); /* XXX */
282 return (0);
285 #ifdef DEBUG_FIND_PCIC
286 #warning DEBUG_FIND_PCIC
287 static void
288 __find_pcic(void)
290 int i, j, step, found;
291 u_int32_t addr;
292 u_int8_t reg;
293 int __read_revid (u_int32_t port)
295 addr = MIPS_PHYS_TO_KSEG1(i + port);
296 printf("%#x\r", i);
297 for (found = 0, j = 0; j < 0x100; j += 0x40) {
298 *((volatile u_int8_t *)addr) = j;
299 reg = *((volatile u_int8_t *)(addr + 1));
300 #ifdef DEBUG_FIND_PCIC_I82365SL_ONLY
301 if (reg == 0x82 || reg == 0x83) {
302 #else
303 if ((reg & 0xc0) == 0x80) {
304 #endif
305 found++;
307 if (found)
308 printf("\nfound %d socket at %#x"
309 "(base from %#x)\n", found, addr,
310 i + port - VR_ISA_PORT_BASE);
313 step = 0x1000000;
314 printf("\nFinding PCIC. Trying ISA port %#x-%#x step %#x\n",
315 VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE, step);
316 for (i = VR_ISA_PORT_BASE; i < VR_ISA_PORT_BASE+VR_ISA_PORT_SIZE;
317 i+= step) {
318 __read_revid (0x3e0);
319 __read_revid (0x3e2);
322 #endif /* DEBUG_FIND_PCIC */
325 #ifdef DEBUG_FIND_COMPORT
326 #warning DEBUG_FIND_COMPORT
328 static int probe_com(u_int32_t);
330 static int
331 probe_com(u_int32_t port_addr)
333 u_int32_t addr;
334 u_int8_t ubtmp1, ubtmp2;
336 addr = MIPS_PHYS_TO_KSEG1(port_addr);
338 *((volatile u_int8_t *)(addr + com_cfcr)) = LCR_8BITS;
339 *((volatile u_int8_t *)(addr + com_iir)) = 0;
341 ubtmp1 = *((volatile u_int8_t *)(addr + com_cfcr));
342 ubtmp2 = *((volatile u_int8_t *)(addr + com_iir));
344 if ((ubtmp1 != LCR_8BITS) || ((ubtmp2 & 0x38) != 0)) {
345 return (0);
348 return (1);
351 static void
352 __find_comport(void)
354 int found;
355 u_int32_t port, step;
357 found = 0;
358 step = 0x08;
360 printf("Searching COM port. Trying ISA port %#x-%#x step %#x\n",
361 VR_ISA_PORT_BASE, VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE - 1, step );
363 for (port = VR_ISA_PORT_BASE;
364 port < (VR_ISA_PORT_BASE + VR_ISA_PORT_SIZE); port += step){
365 if (probe_com(port)) {
366 found++;
367 printf("found %d at %#x\n", found, port);
371 #endif /* DEBUG_FIND_COMPORT */