sys/arch/hpcmips/stand/lcboot/com.c

   1 /*      $NetBSD: com.c,v 1.3 2005/12/11 12:17:34 christos Exp $ */
   2
   3 /*-
   4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Charles M. Hannum.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Copyright (c) 1991 The Regents of the University of California.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. Neither the name of the University nor the names of its contributors
  45  *    may be used to endorse or promote products derived from this software
  46  *    without specific prior written permission.
  47  *
  48  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  49  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  50  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  51  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  52  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  53  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  54  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  55  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  56  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  57  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  58  * SUCH DAMAGE.
  59  *
  60  *      @(#)com.c       7.5 (Berkeley) 5/16/91
  61  */
  62
  63 #include <sys/param.h>
  64
  65 #include <lib/libsa/stand.h>
  66
  67 #include <hpcmips/vr/vripreg.h>
  68 #include <hpcmips/vr/cmureg.h>
  69
  70 #include <dev/ic/comreg.h>
  71 #include <dev/ic/ns16550reg.h>
  72 #include <dev/ic/st16650reg.h>
  73 #define com_lcr com_cfcr
  74
  75 #include "extern.h"
  76
  77 #if 0
  78 #define VRCOM_FREQ      18432000        /* 18.432kHz */
  79 #endif
  80
  81 int
  82 iskey(void)
  83 {
  84         return ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_RXRDY);
  85 }
  86
  87 int
  88 getchar(void)
  89 {
  90         u_int8_t        stat;
  91         u_int8_t        c;
  92
  93         /* block until a character becomes available */
  94         while (!ISKEY)
  95                 ;
  96
  97         c = REGREAD_1(VR4181_SIU_ADDR, com_data);
  98         stat = REGREAD_1(VR4181_SIU_ADDR, com_iir);
  99
 100         return c;
 101 }
 102
 103 static void
 104 comcnputc(int c)
 105 {
 106         int     timo;
 107
 108         /* wait for any pending transmission to finish */
 109         timo = 150000;
 110         while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
 111                && --timo)
 112                 continue;
 113
 114         REGWRITE_1(VR4181_SIU_ADDR, com_data, c);
 115
 116         /* wait for this transmission to complete */
 117         timo = 1500000;
 118         while (!ISSET(REGREAD_1(VR4181_SIU_ADDR, com_lsr), LSR_TXRDY)
 119                && --timo)
 120                 continue;
 121 }
 122
 123 void
 124 putchar(int c)
 125 {
 126         if (c == '\n')
 127                 comcnputc('\r');
 128         comcnputc(c);
 129 }
 130
 131 /*
 132  * Initialize UART for use as console or KGDB line.
 133  */
 134 void
 135 comcninit(void)
 136 {
 137         int             rate;
 138
 139         /* enable divisor latch access and set bit rate */
 140         REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_DLAB);
 141         rate = 10; /* 115200bps with VRCOM_FREQ */
 142         REGWRITE_1(VR4181_SIU_ADDR, com_dlbl, rate);
 143         REGWRITE_1(VR4181_SIU_ADDR, com_dlbh, rate >> 8);
 144
 145         /*
 146          * disable divisor latch access and,
 147          * set "8bit non-parity 1 stop bit"
 148          */
 149         REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_8BITS);
 150
 151         /* disable all interrupt */
 152         REGWRITE_1(VR4181_SIU_ADDR, com_ier, 0);
 153
 154         /* enable FIFO */
 155         REGWRITE_1(VR4181_SIU_ADDR, com_fifo,
 156                    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
 157
 158         /* set DTR and RTS low */
 159         REGWRITE_1(VR4181_SIU_ADDR, com_mcr, MCR_DTR | MCR_RTS);
 160 }