sys/arch/hpcmips/stand/lcboot/i28f128reg.h

   1 /* $NetBSD: i28f128reg.h,v 1.2.2.3 2004/09/21 13:16:12 skrll Exp $ */
   2
   3 /*
   4  * Copyright (c) 2003 Naoto Shimazaki.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY NAOTO SHIMAZAKI AND CONTRIBUTORS ``AS IS''
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE NAOTO OR CONTRIBUTORS BE
  20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  26  * THE POSSIBILITY OF SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * Flash Memory Writer
  31  */
  32
  33 #define I28F128_BLOCK_SIZE      0x20000         /* 128Kbyte */
  34 #define I28F128_BLOCK_MASK      0x1ffff         /* 128Kbyte */
  35
  36 #define I28F128_WBUF_SIZE       0x20
  37
  38 #define I28F128_MANUFACT        0x89
  39 #define I28F128_DEVCODE         0x18
  40 #define I28F128_PRIM_COMM0      0x01
  41 #define I28F128_PRIM_COMM1      0x00
  42 #define I28F128_PRIM_EXT_TBL0   0x31
  43 #define I28F128_PRIM_EXT_TBL1   0x00
  44
  45 #define I28F128_RESET           0xff
  46 #define I28F128_READ_ARRAY      I28F128_RESET
  47 #define I28F128_READ_ID         0x90
  48 #define I28F128_READ_STATUS     0x70
  49 #define I28F128_CLEAR_STATUS    0x50
  50
  51 #define I28F128_BLK_ERASE_1ST   0x20
  52 #define I28F128_BLK_ERASE_2ND   0xd0
  53 #define I28F128_WORDBYTE_PROG   0x40
  54 #define I28F128_WRITE_BUFFER    0xe8
  55 #define I28F128_WBUF_CONFIRM    0xd0
  56
  57 #define I28F128_S_READY         0x80
  58 #define I28F128_S_ERASE_SUSPEND 0x40
  59 #define I28F128_S_ERASE_ERROR   0x20
  60 #define I28F128_S_PROG_ERROR    0x10
  61 #define I28F128_S_LOW_VOLTAGE   0x08
  62 #define I28F128_S_PROG_SUSPEND  0x04
  63 #define I28F128_S_BLOCK_LOCKED  0x02
  64
  65 #define I28F128_XS_BUF_AVAIL    0x80