sys/arch/hpcmips/vr/cfireg.h

   1 /* $NetBSD: cfireg.h,v 1.1 2003/05/01 07:02:03 igy Exp $ */
   2
   3 /*
   4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Common Flash Interface
  34  */
  35
  36 #define CFI_TOTAL_SIZE          0x50
  37
  38 #define CFI_READ_CFI_QUERY      0x98
  39 #define CFI_QUERY_OFFSET        0xaa    /* AMD/Fujitu needs this */
  40
  41 #define CFI_MANUFACT_REG        0x00
  42 #define CFI_DEVCODE_REG         0x01
  43 #define CFI_BLOCK_STAT_REG      0x02
  44 #define CFI_QUERY_ID_STR_REG    0x10
  45 #define CFI_QUERY_ID_STR        "QRY"
  46 #define CFI_QUERY_ID_STR0       'Q'
  47 #define CFI_QUERY_ID_STR1       'R'
  48 #define CFI_QUERY_ID_STR2       'Y'
  49 #define CFI_PRIM_COMM_REG0      0x13
  50 #define CFI_PRIM_COMM_REG1      0x14
  51 #define CFI_PRIM_EXT_TBL_REG0   0x15
  52 #define CFI_PRIM_EXT_TBL_REG1   0x16
  53 #define CFI_ALT_COMM_REG0       0x17
  54 #define CFI_ALT_COMM_REG1       0x18
  55 #define CFI_ALT_EXT_TBL_REG0    0x19
  56 #define CFI_ALT_EXT_TBL_REG1    0x1a
  57 #define CFI_VCC_MIN_REG         0x1b
  58 #define CFI_VCC_MAX_REG         0x1c
  59 #define CFI_VPP_MIN_REG         0x1d
  60 #define CFI_VPP_MAX_REG         0x1e
  61 #define CFI_TYP_WORD_PROG_REG   0x1f
  62 #define CFI_TYP_BUF_WRITE_REG   0x20
  63 #define CFI_TYP_BLOCK_ERASE_REG 0x21
  64 #define CFI_TYP_CHIP_ERASE_REG  0x22
  65 #define CFI_MAX_WORD_PROG_REG   0x23
  66 #define CFI_MAX_BUF_WRITE_REG   0x24
  67 #define CFI_MAX_BLOCK_ERASE_REG 0x25
  68 #define CFI_MAX_CHIP_ERASE_REG  0x26
  69 #define CFI_DEVICE_SIZE_REG     0x27
  70 #define CFI_DEVICE_IF_REG0      0x28
  71 #define CFI_DEVICE_IF_REG1      0x29
  72 #define CFI_MAX_WBUF_SIZE_REG0  0x2a
  73 #define CFI_MAX_WBUF_SIZE_REG1  0x2b
  74 #define CFI_NUM_ERASE_BLK_REG   0x2c
  75
  76 #define CFI_EBLK1_INFO_REG      0x2d
  77 #define CFI_EBLK_INFO_SIZE      4
  78 #define CFI_EBLK_INFO_NSECT0    0x00
  79 #define CFI_EBLK_INFO_NSECT1    0x01
  80 #define CFI_EBLK_INFO_SECSIZE0  0x02
  81 #define CFI_EBLK_INFO_SECSIZE1  0x03
  82
  83 #define CFI_EBLK1_INFO_REG0     0x2d
  84 #define CFI_EBLK1_INFO_REG1     0x2e
  85 #define CFI_EBLK1_INFO_REG2     0x2f
  86 #define CFI_EBLK1_INFO_REG3     0x30
  87 #define CFI_EBLK2_INFO_REG0     0x31
  88 #define CFI_EBLK2_INFO_REG1     0x32
  89 #define CFI_EBLK2_INFO_REG2     0x33
  90 #define CFI_EBLK2_INFO_REG3     0x34
  91 #define CFI_EBLK3_INFO_REG0     0x35
  92 #define CFI_EBLK3_INFO_REG1     0x36
  93 #define CFI_EBLK3_INFO_REG2     0x37
  94 #define CFI_EBLK3_INFO_REG3     0x38
  95 #define CFI_EBLK4_INFO_REG0     0x39
  96 #define CFI_EBLK4_INFO_REG1     0x3a
  97 #define CFI_EBLK4_INFO_REG2     0x3b
  98 #define CFI_EBLK4_INFO_REG3     0x3c
  99
 100
 101 #define CFI_COMMSET_INTEL0      0x01
 102 #define CFI_COMMSET_INTEL1      0x00
 103 #define CFI_COMMSET_AMDFJITU0   0x02
 104 #define CFI_COMMSET_AMDFJITU1   0x00