sys/arch/hpcmips/vr/flashreg.h

   1 /* $NetBSD: flashreg.h,v 1.1 2003/05/01 07:02:04 igy Exp $ */
   2
   3 /*
   4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Intel 28F128 Flash Memory registers
  34  */
  35
  36 #define I28F128_BLOCK_SIZE      0x20000         /* 128Kbyte */
  37 #define I28F128_BLOCK_MASK      0x1ffff         /* 128Kbyte */
  38
  39 #define I28F128_MANUFACT        0x89
  40 #define I28F128_DEVCODE         0x18
  41 #define I28F128_PRIM_COMM0      0x01
  42 #define I28F128_PRIM_COMM1      0x00
  43 #define I28F128_PRIM_EXT_TBL0   0x31
  44 #define I28F128_PRIM_EXT_TBL1   0x00
  45
  46 #define I28F128_RESET           0xff
  47 #define I28F128_READ_ARRAY      I28F128_RESET
  48 #define I28F128_READ_ID         0x90
  49 #define I28F128_READ_STATUS     0x70
  50 #define I28F128_CLEAR_STATUS    0x50
  51
  52 #define I28F128_BLK_ERASE_1ST   0x20
  53 #define I28F128_BLK_ERASE_2ND   0xd0
  54 #define I28F128_WORDBYTE_PROG   0x40
  55 #define I28F128_WRITE_BUFFER    0xe8
  56 #define I28F128_WBUF_CONFIRM    0xd0
  57
  58 #define I28F128_S_READY         0x80
  59 #define I28F128_S_ERASE_SUSPEND 0x40
  60 #define I28F128_S_COMSEQ_ERROR  0x30
  61 #define I28F128_S_ERASE_ERROR   0x20
  62 #define I28F128_S_PROG_ERROR    0x10
  63 #define I28F128_S_LOW_VOLTAGE   0x08
  64 #define I28F128_S_PROG_SUSPEND  0x04
  65 #define I28F128_S_BLOCK_LOCKED  0x02
  66
  67 #define I28F128_XS_BUF_AVAIL    0x80
  68
  69 #define I28F128_BUFFER_SIZE     0x20
  70
  71 #define I28F128_BLOCK_ERASE_TIME        1000000 /* usec */
  72 #define I28F128_WRITE_BUFFER_TIMEOUT    800     /* usec */
  73 #define I28F128_WRITE_WORD_TIMEOUT      800     /* usec */
  74
  75
  76 #define MBM29LV160_MANUFACT     0x04
  77 #define MBM29LV160TE_DEVCODE    0x22c4
  78 #define MBM29LV160BE_DEVCODE    0x2249
  79
  80 #define MBM29LV160_SUBSECT_MASK         0x000f8000
  81 #define MBM29LV160TE_SUBSECT_ADDR       0x000f8000
  82 #define MBM29LV160BE_SUBSECT_ADDR       0x00000000
  83
  84 #define MBM29LV160_COMM_ADDR0   (0x555 << 1)
  85 #define MBM29LV160_COMM_ADDR1   (0x2aa << 1)
  86 #define MBM29LV160_COMM_ADDR2   (0x555 << 1)
  87 #define MBM29LV160_COMM_ADDR3   (0x555 << 1)
  88 #define MBM29LV160_COMM_ADDR4   (0x2aa << 1)
  89 #define MBM29LV160_COMM_ADDR5   (0x555 << 1)
  90
  91 #define MBM29LV160_COMM_CMD0    0xaa
  92 #define MBM29LV160_COMM_CMD1    0x55
  93
  94 #define MBM29LV160_SIGN_CMD2    0x90
  95 #define MBM29LV160_PROG_CMD2    0xa0
  96 #define MBM29LV160_ESECT_CMD2   0x80
  97 #define MBM29LV160_ESECT_CMD3   0xaa
  98 #define MBM29LV160_ESECT_CMD4   0x55
  99 #define MBM29LV160_ESECT_CMD5   0x30
 100
 101 #define MBM29LV160_DEVCODE_REG  0x02
 102
 103 #define MBM29LV160_SECT_SIZE    0x00010000
 104 #define MBM29LV160_SUBSECT_SIZE 0x00002000