sys/arch/hpcmips/vr/vrc4172icureg.h

   1 /*      $NetBSD: vrc4172icureg.h,v 1.1 2000/11/11 04:42:08 sato Exp $   */
   2
   3 /*
   4  * Copyright (c) 2000 SATO Kazumi.  All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions, and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 /*
  29  * Vrc4172 ICU unit register definition
  30  */
  31 #define VRC2_ICU_1284INTRQ      0x0
  32 #define         VRC2_ICU_1284IRQ        0x08    /* interrupt to IRQ */
  33 #define         VRC2_ICU_1284INTRP      0x04    /* interrupt to INTRP */
  34 #define         VRC2_ICU_1284THRU       0x02    /* turu status */
  35 #define         VRC2_ICU_1284LATCH      0x01    /* latched status and clear */
  36
  37 #define VRC2_ICU_16550INTRQ     0x2
  38 #define         VRC2_ICU_16550THRU      0x02    /* turu status */
  39 #define         VRC2_ICU_16550LATCH     0x01    /* latched status and clear */
  40
  41 /* end */