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[netbsd-mini2440.git] / sys / arch / hpcmips / vr / vrc4173bcu.c
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1 /* $NetBSD: vrc4173bcu.c,v 1.20 2008/12/16 22:35:23 christos Exp $ */
3 /*-
4 * Copyright (c) 2001,2002 Enami Tsugutomo.
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: vrc4173bcu.c,v 1.20 2008/12/16 22:35:23 christos Exp $");
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
36 #include <machine/bus.h>
38 #include <dev/pci/pcivar.h>
39 #include <dev/pci/pcidevs.h>
41 #include <machine/platid.h>
42 #include <machine/platid_mask.h>
43 #include <machine/config_hook.h>
45 #include <hpcmips/vr/vripunit.h>
46 #include <hpcmips/vr/vripif.h>
47 #include <hpcmips/vr/vrc4173bcuvar.h>
48 #include <hpcmips/vr/vrc4173icureg.h>
49 #include <hpcmips/vr/vrc4173cmureg.h>
51 #include "locators.h"
53 #ifdef VRC4173BCU_DEBUG
54 #define DPRINTF_ENABLE
55 #define DPRINTF_DEBUG vrc4173bcu_debug
56 #endif
57 #define USE_HPC_DPRINTF
58 #include <machine/debug.h>
60 #define VRC4173BCU_BADR 0x10
61 #define USE_WINCE_CLKMASK (~0)
63 static int vrc4173bcu_match(struct device *, struct cfdata *, void *);
64 static void vrc4173bcu_attach(struct device *, struct device *, void *);
65 static int vrc4173bcu_intr(void *);
66 static int vrc4173bcu_print(void *, const char *);
67 static int vrc4173bcu_search(struct device *, struct cfdata *cf,
68 const int *, void *);
69 static int vrc4173bcu_pci_intr(void *);
70 #ifdef VRC4173BCU_DEBUG
71 static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t,
72 vrip_intr_handle_t);
73 #endif
75 int __vrc4173bcu_power(vrip_chipset_tag_t, int, int);
76 vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int,
77 int, int(*)(void*), void*);
78 void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t);
79 void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int);
80 void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t,
81 u_int32_t, int);
82 void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t,
83 u_int32_t*);
84 void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
85 void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t);
86 void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
87 void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
88 int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int);
91 * machine dependent info
93 static struct vrc4173bcu_platdep {
94 platid_mask_t *platidmask;
95 u_int32_t clkmask;
96 int intrmask;
97 } platdep_table[] = {
99 &platid_mask_MACH_VICTOR_INTERLINK_MPC303,
100 USE_WINCE_CLKMASK, /* clock mask */
101 (1 << VRC4173ICU_USBINTR)| /* intrrupts */
102 (1 << VRC4173ICU_PCMCIA1INTR)|
103 (1 << VRC4173ICU_PCMCIA2INTR),
106 &platid_mask_MACH_VICTOR_INTERLINK_MPC304,
107 USE_WINCE_CLKMASK, /* clock mask */
108 (1 << VRC4173ICU_USBINTR)| /* intrrupts */
109 (1 << VRC4173ICU_PCMCIA1INTR)|
110 (1 << VRC4173ICU_PCMCIA2INTR),
113 &platid_mask_MACH_NEC_MCR_SIGMARION2,
114 USE_WINCE_CLKMASK, /* clock mask */
115 (1 << VRC4173ICU_USBINTR), /* intrrupts */
118 &platid_wild,
119 USE_WINCE_CLKMASK, /* XXX */
124 struct vrc4173bcu_unit {
125 const char *vu_name;
126 int vu_intr[2];
127 int vu_clkmask;
128 bus_addr_t vu_lreg;
129 bus_addr_t vu_mlreg;
130 bus_addr_t vu_hreg;
131 bus_addr_t vu_mhreg;
134 struct vrc4173bcu_softc {
135 struct device sc_dev;
136 struct vrip_chipset_tag sc_chipset;
137 struct vrcmu_chipset_tag sc_cmuchip;
139 pci_chipset_tag_t sc_pc;
140 bus_space_tag_t sc_iot;
141 bus_space_handle_t sc_ioh;
142 bus_size_t sc_size;
144 bus_space_handle_t sc_icuh; /* I/O handle for ICU. */
145 bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */
146 void *sc_ih;
147 #define VRC4173BCU_NINTRS 16
148 int sc_intrmask;
149 struct vrc4173bcu_intrhand {
150 int (*ih_fun)(void *);
151 void *ih_arg;
152 const struct vrc4173bcu_unit *ih_unit;
153 } sc_intrhands[32];
155 struct vrc4173bcu_unit *sc_units;
156 int sc_nunits;
157 int sc_pri;
159 struct vrc4173bcu_platdep *sc_platdep;
162 #define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits)
164 static struct vrc4173bcu_unit vrc4173bcu_units[] = {
165 [VRIP_UNIT_KIU] = {
166 "kiu",
167 { VRC4173ICU_KIUINTR, },
168 VRC4173CMU_CLKMSK_KIU,
169 VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT,
171 [VRIP_UNIT_PIU] = {
172 "piu",
173 { VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR},
174 VRC4173CMU_CLKMSK_PIU,
175 VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT,
177 [VRIP_UNIT_AIU] = {
178 "aiu",
179 { VRC4173ICU_AIUINTR, },
180 VRC4173CMU_CLKMSK_AIU,
181 VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT,
183 [VRIP_UNIT_GIU] = {
184 "giu",
185 { VRC4173ICU_GIUINTR, },
187 VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT,
188 VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT,
190 [VRIP_UNIT_PS2U0] = {
191 "PS/2-Ch1",
192 { VRC4173ICU_PS2CH1INTR, },
193 VRC4173CMU_CLKMSK_PS2CH1,
195 [VRIP_UNIT_PS2U1] = {
196 "PS/2-Ch2",
197 { VRC4173ICU_PS2CH2INTR, },
198 VRC4173CMU_CLKMSK_PS2CH2,
200 [VRIP_UNIT_USBU] = {
201 "usbu",
202 { VRC4173ICU_USBINTR, },
203 VRC4173CMU_CLKMSK_USB,
205 [VRIP_UNIT_CARDU0] = {
206 "cardu0",
207 { VRC4173ICU_PCMCIA1INTR, },
208 VRC4173CMU_CLKMSK_CARD1,
210 [VRIP_UNIT_CARDU1] = {
211 "cardu1",
212 { VRC4173ICU_PCMCIA2INTR, },
213 VRC4173CMU_CLKMSK_CARD2,
217 CFATTACH_DECL(vrc4173bcu, sizeof(struct vrc4173bcu_softc),
218 vrc4173bcu_match, vrc4173bcu_attach, NULL, NULL);
220 static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = {
221 .vc_power = __vrc4173bcu_power,
222 .vc_intr_establish = __vrc4173bcu_intr_establish,
223 .vc_intr_disestablish = __vrc4173bcu_intr_disestablish,
224 .vc_intr_setmask1 = __vrc4173bcu_intr_setmask1,
225 .vc_intr_setmask2 = __vrc4173bcu_intr_setmask2,
226 .vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2,
227 .vc_register_cmu = __vrc4173bcu_register_cmu,
228 .vc_register_gpio = __vrc4173bcu_register_gpio,
229 .vc_register_dmaau = __vrc4173bcu_register_dmaau,
230 .vc_register_dcu = __vrc4173bcu_register_dcu,
234 vrc4173bcu_match(struct device *parent, struct cfdata *match, void *aux)
236 struct pci_attach_args *pa = (struct pci_attach_args *)aux;
238 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC &&
239 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU)
240 return (1);
242 return (0);
245 void
246 vrc4173bcu_attach(struct device *parent, struct device *self, void *aux)
248 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)self;
249 struct pci_attach_args *pa = (struct pci_attach_args *)aux;
250 pci_chipset_tag_t pc = pa->pa_pc;
251 pcitag_t tag = pa->pa_tag;
252 pcireg_t csr;
253 char devinfo[256];
254 u_int16_t reg;
255 pci_intr_handle_t ih;
256 const char *intrstr;
257 int bus, device, function;
258 #ifdef DEBUG
259 char buf[80];
260 #endif
262 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
263 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
265 #if 0
266 printf("%s: ", sc->sc_dev.dv_xname);
267 pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
268 #endif
270 sc->sc_pc = pc;
271 sc->sc_cmuchip.cc_sc = sc;
272 sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock;
273 sc->sc_units = vrc4173bcu_units;
274 sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit);
275 sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */
276 sc->sc_chipset.vc_sc = sc;
278 sc->sc_platdep = platid_search(&platid, platdep_table,
279 sizeof(platdep_table)/sizeof(*platdep_table),
280 sizeof(*platdep_table));
282 /* Map I/O registers */
283 if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0,
284 &sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) {
285 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname);
286 return;
289 /* Enable the device. */
290 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
291 DPRINTF(("%s: csr = 0x%08x", sc->sc_dev.dv_xname, csr));
292 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
293 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
294 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
295 DPRINTF((" -> 0x%08x\n", csr));
297 csr = pci_conf_read(pc, tag, VRC4173BCU_BADR);
298 DPRINTF(("%s: base addr = %x@0x%08x\n", sc->sc_dev.dv_xname,
299 (int)sc->sc_size, csr));
300 DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", sc->sc_dev.dv_xname,
301 (int)sc->sc_iot, (int)sc->sc_ioh));
304 * Map I/O space for ICU.
306 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
307 VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) {
308 printf(": can't map ICU i/o space\n");
309 return;
313 * Map I/O space for CMU.
315 if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
316 VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) {
317 printf(": can't map CMU i/o space\n");
318 return;
321 /* machine dependent setup */
322 if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) {
323 /* XXX, You can nothing! */
324 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh,
325 VRC4173CMU_CLKMSK);
326 printf("%s: default clock mask is %04x\n",
327 sc->sc_dev.dv_xname, reg);
328 } else {
329 /* assert all reset bits */
330 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST,
331 VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB |
332 VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1);
333 /* set clock mask */
334 bus_space_write_2(sc->sc_iot, sc->sc_cmuh,
335 VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask);
336 /* clear reset bit */
337 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0);
340 #ifdef DEBUG
341 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
342 snprintb(buf, sizeof(buf),
343 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
344 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
345 printf("%s: SYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
347 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT);
348 snprintb(buf, sizeof(buf),
349 "\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7"
350 "\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", reg);
351 printf("%s: MKIUINT = 0x%s\n", sc->sc_dev.dv_xname, buf);
353 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
354 snprintb(buf, sizeof(buf),
355 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
356 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
357 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
359 #if 1
360 reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR |
361 VRC4173ICU_DOZEPIUINTR;
362 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg);
364 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
365 snprintb(buf, sizeof(buf),
366 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
367 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
368 printf("%s: MSYSINT1 = 0x%s\n", sc->sc_dev.dv_xname, buf);
369 #endif
370 #endif
373 * set interrupt mask
375 sc->sc_intrmask = sc->sc_platdep->intrmask;
376 bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
377 sc->sc_intrmask);
380 * install interrupt handler
382 if (pci_intr_map(pa, &ih)) {
383 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
384 return;
386 intrstr = pci_intr_string(pc, ih);
387 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc);
388 if (sc->sc_ih == NULL) {
389 printf("%s: couldn't establish interrupt",
390 sc->sc_dev.dv_xname);
391 if (intrstr != NULL)
392 printf(" at %s", intrstr);
393 printf("\n");
394 return;
396 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
399 * install pci intr hooks
401 pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function);
402 /* USB unit */
403 if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR))
404 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0,
405 IPL_NET, vrc4173bcu_pci_intr,
406 config_connect(CONFIG_HOOK_PCIINTR,
407 CONFIG_HOOK_PCIINTR_ID(bus, device, 2)));
408 /* PC card unit 1 */
409 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR))
410 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0,
411 IPL_NET, vrc4173bcu_pci_intr,
412 config_connect(CONFIG_HOOK_PCIINTR,
413 CONFIG_HOOK_PCIINTR_ID(bus, 1, 0)));
414 /* PC card unit 2 */
415 if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR))
416 vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0,
417 IPL_NET, vrc4173bcu_pci_intr,
418 config_connect(CONFIG_HOOK_PCIINTR,
419 CONFIG_HOOK_PCIINTR_ID(bus, 2, 0)));
422 * Attach each devices
423 * sc->sc_pri = 2~1
425 for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--)
426 config_search_ia(vrc4173bcu_search, self, "vripif",
427 vrc4173bcu_print);
431 vrc4173bcu_print(void *aux, const char *hoge)
433 struct vrip_attach_args *va = (struct vrip_attach_args*)aux;
435 if (va->va_addr != VRIPIFCF_ADDR_DEFAULT)
436 aprint_normal(" addr 0x%04lx", va->va_addr);
437 if (va->va_size != VRIPIFCF_SIZE_DEFAULT)
438 aprint_normal("-%04lx",
439 (va->va_addr + va->va_size - 1) & 0xffff);
440 if (va->va_addr2 != VRIPIFCF_ADDR2_DEFAULT)
441 aprint_normal(", 0x%04lx", va->va_addr2);
442 if (va->va_size2 != VRIPIFCF_SIZE2_DEFAULT)
443 aprint_normal("-%04lx",
444 (va->va_addr2 + va->va_size2 - 1) & 0xffff);
446 return (UNCONF);
450 vrc4173bcu_search(struct device *parent, struct cfdata *cf,
451 const int *ldesc, void *aux)
453 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)parent;
454 struct vrip_attach_args va;
456 memset(&va, 0, sizeof(va));
457 va.va_vc = &sc->sc_chipset;
458 va.va_iot = sc->sc_iot;
459 va.va_parent_ioh = sc->sc_ioh;
460 va.va_unit = cf->cf_loc[VRIPIFCF_UNIT];
461 va.va_addr = cf->cf_loc[VRIPIFCF_ADDR];
462 va.va_size = cf->cf_loc[VRIPIFCF_SIZE];
463 va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2];
464 va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2];
465 va.va_gpio_chips = NULL; /* XXX */
466 va.va_cc = sc->sc_chipset.vc_cc;
467 va.va_ac = sc->sc_chipset.vc_ac;
468 va.va_dc = sc->sc_chipset.vc_dc;
469 if ((config_match(parent, cf, &va) == sc->sc_pri))
470 config_attach(parent, cf, &va, vrc4173bcu_print);
472 return (0);
476 vrc4173bcu_intr(void *arg)
478 struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg;
479 u_int16_t reg;
480 struct vrc4173bcu_intrhand *ih;
481 int i;
483 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
484 reg &= sc->sc_intrmask;
485 if (reg == 0)
486 return (0);
488 #if 0
490 char buf[80];
491 snprintb(buf, sizeof(buf),
492 "\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
493 "\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
494 printf("%s: %s\n", sc->sc_dev.dv_xname, buf);
496 #endif
497 for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++)
498 if ((reg & (1 << i)) && ih->ih_fun != NULL)
499 ih->ih_fun(ih->ih_arg);
501 return (1);
504 static int
505 vrc4173bcu_pci_intr(void *arg)
507 config_call_tag ct = (config_call_tag)arg;
508 config_connected_call(ct, NULL);
510 return (0);
513 #ifdef VRC4173BCU_DEBUG
514 static void
515 vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
517 struct vrc4173bcu_softc *sc = vc->vc_sc;
518 struct vrc4173bcu_intrhand *ih = handle;
519 const struct vrc4173bcu_unit *vu = ih->ih_unit;
520 u_int32_t reg;
522 if (vu->vu_mlreg) {
523 DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0]));
524 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
525 if (vu->vu_mhreg) {
526 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh,
527 vu->vu_mhreg) << 16);
528 dbg_bit_print(reg);
529 } else
530 dbg_bit_print(reg);
533 #endif
536 __vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff)
538 struct vrc4173bcu_softc *sc = vc->vc_sc;
539 const struct vrc4173bcu_unit *vu;
541 if (sc->sc_chipset.vc_cc == NULL)
542 return (0); /* You have no clock mask unit yet. */
543 if (!VALID_UNIT(sc, unit))
544 return (0);
545 vu = &sc->sc_units[unit];
547 return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc,
548 vu->vu_clkmask, onoff);
551 vrip_intr_handle_t
552 __vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line,
553 int level, int (*ih_fun)(void *), void *ih_arg)
555 struct vrc4173bcu_softc *sc = vc->vc_sc;
556 const struct vrc4173bcu_unit *vu;
557 struct vrc4173bcu_intrhand *ih;
559 if (!VALID_UNIT(sc, unit))
560 return (NULL);
561 vu = &sc->sc_units[unit];
562 ih = &sc->sc_intrhands[vu->vu_intr[line]];
563 if (ih->ih_fun) /* Can't share level 1 interrupt */
564 return (NULL);
565 ih->ih_fun = ih_fun;
566 ih->ih_arg = ih_arg;
567 ih->ih_unit = vu;
569 /* Mask level 2 interrupt mask register. (disable interrupt) */
570 vrip_intr_setmask2(vc, ih, ~0, 0);
571 /* Unmask Level 1 interrupt mask register (enable interrupt) */
572 vrip_intr_setmask1(vc, ih, 1);
574 return ((void *)ih);
577 void
578 __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
580 struct vrc4173bcu_intrhand *ih = handle;
582 /* Mask Level 1 interrupt mask register (disable interrupt) */
583 vrip_intr_setmask1(vc, ih, 0);
584 /* Mask level 2 interrupt mask register(if any). (disable interrupt) */
585 vrip_intr_setmask2(vc, ih, ~0, 0);
586 ih->ih_fun = NULL;
587 ih->ih_arg = NULL;
590 /* Set level 1 interrupt mask. */
591 void
592 __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
593 int enable)
595 struct vrc4173bcu_softc *sc = vc->vc_sc;
596 struct vrc4173bcu_intrhand *ih = handle;
597 int level1 = ih - sc->sc_intrhands;
599 DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n",
600 enable ? "enable" : "disable", level1));
601 if (enable)
602 sc->sc_intrmask |= (1 << level1);
603 else
604 sc->sc_intrmask &= ~(1 << level1);
605 bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
606 sc->sc_intrmask);
607 #ifdef VRC4173BCU_DEBUG
608 if (vrc4173bcu_debug)
609 dbg_bit_print(sc->sc_intrmask);
610 #endif
612 return;
615 /* Get level 2 interrupt status */
616 void
617 __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
618 u_int32_t *status /* Level 2 status */)
620 struct vrc4173bcu_softc *sc = vc->vc_sc;
621 struct vrc4173bcu_intrhand *ih = handle;
622 const struct vrc4173bcu_unit *vu = ih->ih_unit;
623 u_int32_t reg;
625 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg);
626 reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16);
627 *status = reg;
630 /* Set level 2 interrupt mask. */
631 void
632 __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
633 u_int32_t mask /* Level 2 mask */, int onoff)
635 struct vrc4173bcu_softc *sc = vc->vc_sc;
636 struct vrc4173bcu_intrhand *ih = handle;
637 const struct vrc4173bcu_unit *vu = ih->ih_unit;
638 u_int16_t reg;
640 DPRINTF(("vrc4173bcu_intr_setmask2:\n"));
641 #ifdef VRC4173BCU_DEBUG
642 if (vrc4173bcu_debug)
643 vrc4173bcu_dump_level2mask(vc, handle);
644 #endif
645 if (vu->vu_mlreg) {
646 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
647 if (onoff)
648 reg |= (mask & 0xffff);
649 else
650 reg &= ~(mask & 0xffff);
651 bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg);
653 if (vu->vu_mhreg) {
654 reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg);
655 if (onoff)
656 reg |= ((mask >> 16) & 0xffff);
657 else
658 reg &= ~((mask >> 16) & 0xffff);
659 bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg);
661 #ifdef VRC4173BCU_DEBUG
662 if (vrc4173bcu_debug)
663 vrc4173bcu_dump_level2mask(vc, handle);
664 #endif
666 return;
670 __vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff)
672 struct vrc4173bcu_softc *sc = cc->cc_sc;
673 u_int16_t reg;
675 reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK);
676 #if 0
677 printf("cmu register(enter):");
678 dbg_bit_print(reg);
679 #endif
680 if (onoff)
681 reg |= mask;
682 else
683 reg &= ~mask;
684 bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg);
685 #if 0
686 printf("cmu register(exit) :");
687 dbg_bit_print(reg);
688 #endif
689 return (0);
692 void
693 __vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu)
695 vc->vc_cc = cmu;
698 void
699 __vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip)
701 /* XXX, not implemented yet */
704 void
705 __vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau)
708 vc->vc_ac = dmaau;
711 void
712 __vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu)
715 vc->vc_dc = dcu;