sys/arch/hpcmips/vr/vrecu.c

   1 /* $NetBSD: vrecu.c,v 1.8 2009/09/14 12:49:33 tsutsui Exp $ */
   2
   3 /*
   4  * Copyright (c) 2002 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Naoto Shimazaki of YOKOGAWA Electric Corporation.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __KERNEL_RCSID(0, "$NetBSD: vrecu.c,v 1.8 2009/09/14 12:49:33 tsutsui Exp $");
  34
  35 #include <sys/param.h>
  36 #include <sys/device.h>
  37 #include <sys/malloc.h>
  38 #include <sys/queue.h>
  39 #include <sys/systm.h>
  40
  41 #include <machine/bus.h>
  42 #include <machine/intr.h>
  43
  44 #include <hpcmips/vr/vrcpudef.h>
  45 #include <hpcmips/vr/vripif.h>
  46 #include <hpcmips/vr/vr4181ecureg.h>
  47
  48 #include <dev/isa/isareg.h>
  49 #include <dev/isa/isavar.h>
  50 #include <dev/pcmcia/pcmciareg.h>
  51 #include <dev/pcmcia/pcmciavar.h>
  52 #include <dev/pcmcia/pcmciachip.h>
  53
  54 #include <dev/ic/i82365reg.h>
  55 #include <dev/ic/i82365var.h>
  56 #include <dev/isa/i82365_isavar.h>
  57
  58 static int pcic_vrip_match(struct device *, struct cfdata *, void *);
  59 static void pcic_vrip_attach(struct device *, struct device *, void *);
  60 static void *pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t,
  61                                            struct pcmcia_function *, int,
  62                                            int (*)(void *), void *);
  63 static void pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t, void *);
  64 static int pcic_vrip_intr(void *);
  65
  66 struct pcic_vrip_softc {
  67         struct pcic_softc       sc_pcic;        /* real pcic softc */
  68         uint16_t                sc_intr_mask;
  69         uint16_t                sc_intr_valid;
  70         struct intrhand {
  71                 int     (*ih_fun)(void *);
  72                 void    *ih_arg;
  73         }                       sc_intrhand[ECU_MAX_INTR];
  74 };
  75
  76 CFATTACH_DECL(pcic_vrip, sizeof(struct pcic_vrip_softc),
  77               pcic_vrip_match, pcic_vrip_attach, NULL, NULL);
  78
  79 static struct pcmcia_chip_functions pcic_vrip_functions = {
  80         .mem_alloc              = pcic_chip_mem_alloc,
  81         .mem_free               = pcic_chip_mem_free,
  82         .mem_map                = pcic_chip_mem_map,
  83         .mem_unmap              = pcic_chip_mem_unmap,
  84
  85         .io_alloc               = pcic_chip_io_alloc,
  86         .io_free                = pcic_chip_io_free,
  87         .io_map                 = pcic_chip_io_map,
  88         .io_unmap               = pcic_chip_io_unmap,
  89
  90         .intr_establish         = pcic_vrip_chip_intr_establish,
  91         .intr_disestablish      = pcic_vrip_chip_intr_disestablish,
  92
  93         .socket_enable          = pcic_chip_socket_enable,
  94         .socket_disable         = pcic_chip_socket_disable,
  95         .socket_settype         = pcic_chip_socket_settype,
  96 };
  97
  98
  99 static int
 100 pcic_vrip_match(struct device *parent, struct cfdata *match, void *aux)
 101 {
 102         return 1;
 103 }
 104
 105 static void
 106 pcic_vrip_attach(struct device *parent, struct device *self, void *aux)
 107 {
 108         struct pcic_vrip_softc  *vsc = device_private(self);
 109         struct pcic_softc       *sc = &vsc->sc_pcic;
 110         struct vrip_attach_args *va = aux;
 111         bus_space_handle_t      ioh;
 112         bus_space_handle_t      memh;
 113         int                     i;
 114
 115         vsc->sc_intr_valid = PCIC_INTR_IRQ_VALIDMASK;
 116         vsc->sc_intr_mask = 0xffff;
 117         for (i = 0; i < ECU_MAX_INTR; i++)
 118                 vsc->sc_intrhand[i].ih_fun = NULL;
 119
 120         if ((sc->ih = vrip_intr_establish(va->va_vc, va->va_unit, 0,
 121                                           IPL_NET, pcic_vrip_intr, vsc))
 122             == NULL) {
 123                 printf(": can't establish interrupt");
 124         }
 125
 126         /* Map i/o space. */
 127         if (bus_space_map(va->va_iot, va->va_addr, ECU_SIZE, 0, &ioh)) {
 128                 printf(": can't map pcic register space\n");
 129                 return;
 130         }
 131
 132         /* init CFG_REG_1 */
 133         bus_space_write_2(va->va_iot, ioh, ECU_CFG_REG_1_W, 0x0001);
 134
 135         /* mask all interrupt */
 136         bus_space_write_2(va->va_iot, ioh, ECU_INTMSK_REG_W,
 137                           vsc->sc_intr_mask);
 138
 139         /* Map mem space. */
 140 #if 1
 141         if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x4000, 0, &memh))
 142                 panic("pcic_pci_attach: can't map mem space");
 143
 144         sc->membase = VR_ISA_MEM_BASE;
 145         sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1;
 146
 147         sc->iobase = VR_ISA_PORT_BASE + 0x400;
 148         sc->iosize = 0xbff;
 149 #else
 150         if (bus_space_map(va->va_iot, VR_ISA_MEM_BASE, 0x70000, 0, &memh))
 151                 panic("pcic_pci_attach: can't map mem space");
 152
 153         sc->membase = VR_ISA_MEM_BASE;
 154         sc->subregionmask = (1 << (0x70000 / PCIC_MEM_PAGESIZE)) - 1;
 155
 156         sc->iobase = VR_ISA_PORT_BASE;
 157         sc->iosize = 0x10000;
 158 #endif
 159
 160         sc->pct = &pcic_vrip_functions;
 161
 162         sc->iot = va->va_iot;
 163         sc->ioh = ioh;
 164         sc->memt = va->va_iot;
 165         sc->memh = memh;
 166
 167         printf("\n");
 168
 169         sc->irq = -1;
 170
 171         pcic_attach(sc);
 172         pcic_attach_sockets(sc);
 173         pcic_attach_sockets_finish(sc);
 174 }
 175
 176 static void *
 177 pcic_vrip_chip_intr_establish(pcmcia_chipset_handle_t pch,
 178                               struct pcmcia_function *pf,
 179                               int ipl,
 180                               int (*ih_fun)(void *),
 181                               void *ih_arg)
 182 {
 183         struct pcic_handle      *h;
 184         struct pcic_softc       *sc;
 185         struct pcic_vrip_softc  *vsc;
 186         struct intrhand         *ih;
 187
 188         int     irq;
 189         int     r;
 190
 191
 192         /*
 193          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 194          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 195          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 196          */
 197         irq = 11;
 198         /*
 199          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 200          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 201          * XXXXXXXXXXXXXXXXXXXXXXXXXXXX
 202          */
 203
 204
 205         h = (struct pcic_handle *) pch;
 206         vsc = device_private(h->ph_parent);
 207         sc = &vsc->sc_pcic;
 208
 209
 210         ih = &vsc->sc_intrhand[irq];
 211         if (ih->ih_fun) /* cannot share ecu interrupt */
 212                 return NULL;
 213         ih->ih_fun = ih_fun;
 214         ih->ih_arg = ih_arg;
 215
 216         h->ih_irq = irq;
 217         if (h->flags & PCIC_FLAG_ENABLED) {
 218                 r = pcic_read(h, PCIC_INTR);
 219                 r &= ~PCIC_INTR_IRQ_MASK;
 220                 pcic_write(h, PCIC_INTR, r | irq);
 221         }
 222
 223         vsc->sc_intr_mask &= ~(1 << irq);
 224         bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
 225                           vsc->sc_intr_mask);
 226
 227         return ih;
 228 }
 229
 230 static void
 231 pcic_vrip_chip_intr_disestablish(pcmcia_chipset_handle_t pch, void *arg)
 232 {
 233         struct pcic_handle      *h;
 234         struct pcic_softc       *sc;
 235         struct pcic_vrip_softc  *vsc;
 236         struct intrhand         *ih = arg;
 237
 238         int     s;
 239         int     r;
 240
 241         h = (struct pcic_handle *) pch;
 242         vsc = device_private(h->ph_parent);
 243         sc = &vsc->sc_pcic;
 244
 245         if (ih != &vsc->sc_intrhand[h->ih_irq])
 246                 panic("pcic_vrip_chip_intr_disestablish: bad handler");
 247
 248         s = splhigh();
 249
 250         vsc->sc_intr_mask |= 1 << h->ih_irq;
 251         bus_space_write_2(sc->iot, sc->ioh, ECU_INTMSK_REG_W,
 252                           vsc->sc_intr_mask);
 253
 254         h->ih_irq = 0;
 255         if (h->flags & PCIC_FLAG_ENABLED) {
 256                 r = pcic_read(h, PCIC_INTR);
 257                 r &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
 258                 pcic_write(h, PCIC_INTR, r);
 259         }
 260
 261         ih->ih_fun = NULL;
 262         ih->ih_arg = NULL;
 263
 264         splx(s);
 265 }
 266
 267 /*
 268  * interrupt handler
 269  */
 270 static int
 271 pcic_vrip_intr(void *arg)
 272 {
 273         struct pcic_vrip_softc  *vsc = arg;
 274         struct pcic_softc       *sc = &vsc->sc_pcic;
 275         int                     i;
 276         uint16_t                r;
 277
 278         r = bus_space_read_2(sc->iot, sc->ioh, ECU_INTSTAT_REG_W)
 279                 & ~vsc->sc_intr_mask;
 280
 281         for (i = 0; i < ECU_MAX_INTR; i++) {
 282                 struct intrhand *ih = &vsc->sc_intrhand[i];
 283                 if (ih->ih_fun && (r & (1 << i)))
 284                         ih->ih_fun(ih->ih_arg);
 285         }
 286         return 1;
 287 }