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[netbsd-mini2440.git] / sys / arch / m68k / fpe / fpu_calcea.c
blobb93791bed72c9fee1577dd85766d6b6d00781ff3
1 /* $NetBSD: fpu_calcea.c,v 1.20 2009/03/14 15:36:09 dsl Exp $ */
3 /*
4 * Copyright (c) 1995 Gordon W. Ross
5 * portion Copyright (c) 1995 Ken Nakata
6 * All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 * 4. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Gordon Ross
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: fpu_calcea.c,v 1.20 2009/03/14 15:36:09 dsl Exp $");
37 #include <sys/param.h>
38 #include <sys/signal.h>
39 #include <sys/systm.h>
40 #include <machine/frame.h>
41 #include <m68k/m68k.h>
43 #include "fpu_emulate.h"
46 * Prototypes of static functions
48 static int decode_ea6(struct frame *frame, struct instruction *insn,
49 struct insn_ea *ea, int modreg);
50 static int fetch_immed(struct frame *frame, struct instruction *insn,
51 int *dst);
52 static int fetch_disp(struct frame *frame, struct instruction *insn,
53 int size, int *res);
54 static int calc_ea(struct insn_ea *ea, char *ptr, char **eaddr);
57 * Helper routines for dealing with "effective address" values.
61 * Decode an effective address into internal form.
62 * Returns zero on success, else signal number.
64 int
65 fpu_decode_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, int modreg)
67 int sig;
69 #ifdef DEBUG
70 if (insn->is_datasize < 0) {
71 panic("decode_ea: called with uninitialized datasize");
73 #endif
75 sig = 0;
77 /* Set the most common value here. */
78 ea->ea_regnum = 8 + (modreg & 7);
80 if ((modreg & 060) == 0) {
81 /* register direct */
82 ea->ea_regnum = modreg & 0xf;
83 ea->ea_flags = EA_DIRECT;
84 #ifdef DEBUG_FPE
85 printf("decode_ea: register direct reg=%d\n", ea->ea_regnum);
86 #endif
87 } else if ((modreg & 077) == 074) {
88 /* immediate */
89 ea->ea_flags = EA_IMMED;
90 sig = fetch_immed(frame, insn, &ea->ea_immed[0]);
91 #ifdef DEBUG_FPE
92 printf("decode_ea: immediate size=%d\n", insn->is_datasize);
93 #endif
96 * rest of the address modes need to be separately
97 * handled for the LC040 and the others.
99 #if 0 /* XXX */
100 else if (frame->f_format == 4 && frame->f_fmt4.f_fa) {
101 /* LC040 */
102 ea->ea_flags = EA_FRAME_EA;
103 ea->ea_fea = frame->f_fmt4.f_fa;
104 #ifdef DEBUG_FPE
105 printf("decode_ea: 68LC040 - in-frame EA (%p) size %d\n",
106 (void *)ea->ea_fea, insn->is_datasize);
107 #endif
108 if ((modreg & 070) == 030) {
109 /* postincrement mode */
110 ea->ea_flags |= EA_POSTINCR;
111 } else if ((modreg & 070) == 040) {
112 /* predecrement mode */
113 ea->ea_flags |= EA_PREDECR;
114 #ifdef M68060
115 #if defined(M68020) || defined(M68030) || defined(M68040)
116 if (cputype == CPU_68060)
117 #endif
118 if (insn->is_datasize == 12)
119 ea->ea_fea -= 8;
120 #endif
123 #endif /* XXX */
124 else {
125 /* 020/030 */
126 switch (modreg & 070) {
128 case 020: /* (An) */
129 ea->ea_flags = 0;
130 #ifdef DEBUG_FPE
131 printf("decode_ea: register indirect reg=%d\n", ea->ea_regnum);
132 #endif
133 break;
135 case 030: /* (An)+ */
136 ea->ea_flags = EA_POSTINCR;
137 #ifdef DEBUG_FPE
138 printf("decode_ea: reg indirect postincrement reg=%d\n",
139 ea->ea_regnum);
140 #endif
141 break;
143 case 040: /* -(An) */
144 ea->ea_flags = EA_PREDECR;
145 #ifdef DEBUG_FPE
146 printf("decode_ea: reg indirect predecrement reg=%d\n",
147 ea->ea_regnum);
148 #endif
149 break;
151 case 050: /* (d16,An) */
152 ea->ea_flags = EA_OFFSET;
153 sig = fetch_disp(frame, insn, 1, &ea->ea_offset);
154 #ifdef DEBUG_FPE
155 printf("decode_ea: reg indirect with displacement reg=%d\n",
156 ea->ea_regnum);
157 #endif
158 break;
160 case 060: /* (d8,An,Xn) */
161 ea->ea_flags = EA_INDEXED;
162 sig = decode_ea6(frame, insn, ea, modreg);
163 break;
165 case 070: /* misc. */
166 ea->ea_regnum = (modreg & 7);
167 switch (modreg & 7) {
169 case 0: /* (xxxx).W */
170 ea->ea_flags = EA_ABS;
171 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr);
172 #ifdef DEBUG_FPE
173 printf("decode_ea: absolute address (word)\n");
174 #endif
175 break;
177 case 1: /* (xxxxxxxx).L */
178 ea->ea_flags = EA_ABS;
179 sig = fetch_disp(frame, insn, 2, &ea->ea_absaddr);
180 #ifdef DEBUG_FPE
181 printf("decode_ea: absolute address (long)\n");
182 #endif
183 break;
185 case 2: /* (d16,PC) */
186 ea->ea_flags = EA_PC_REL | EA_OFFSET;
187 sig = fetch_disp(frame, insn, 1, &ea->ea_absaddr);
188 #ifdef DEBUG_FPE
189 printf("decode_ea: pc relative word displacement\n");
190 #endif
191 break;
193 case 3: /* (d8,PC,Xn) */
194 ea->ea_flags = EA_PC_REL | EA_INDEXED;
195 sig = decode_ea6(frame, insn, ea, modreg);
196 break;
198 case 4: /* #data */
199 /* it should have been taken care of earlier */
200 default:
201 #ifdef DEBUG_FPE
202 printf("decode_ea: invalid addr mode (7,%d)\n", modreg & 7);
203 #endif
204 return SIGILL;
205 } /* switch for mode 7 */
206 break;
207 } /* switch mode */
209 ea->ea_moffs = 0;
211 return sig;
215 * Decode Mode=6 address modes
217 static int
218 decode_ea6(struct frame *frame, struct instruction *insn, struct insn_ea *ea, int modreg)
220 int extword, idx;
221 int basedisp, outerdisp;
222 int bd_size, od_size;
223 int sig;
225 extword = fusword((void *) (insn->is_pc + insn->is_advance));
226 if (extword < 0) {
227 return SIGSEGV;
229 insn->is_advance += 2;
231 /* get register index */
232 ea->ea_idxreg = (extword >> 12) & 0xf;
233 idx = frame->f_regs[ea->ea_idxreg];
234 if ((extword & 0x0800) == 0) {
235 /* if word sized index, sign-extend */
236 idx &= 0xffff;
237 if (idx & 0x8000) {
238 idx |= 0xffff0000;
241 /* scale register index */
242 idx <<= ((extword >>9) & 3);
244 if ((extword & 0x100) == 0) {
245 /* brief extension word - sign-extend the displacement */
246 basedisp = (extword & 0xff);
247 if (basedisp & 0x80) {
248 basedisp |= 0xffffff00;
251 ea->ea_basedisp = idx + basedisp;
252 ea->ea_outerdisp = 0;
253 #if DEBUG_FPE
254 printf("decode_ea6: brief ext word idxreg=%d, basedisp=%08x\n",
255 ea->ea_idxreg, ea->ea_basedisp);
256 #endif
257 } else {
258 /* full extension word */
259 if (extword & 0x80) {
260 ea->ea_flags |= EA_BASE_SUPPRSS;
262 bd_size = ((extword >> 4) & 3) - 1;
263 od_size = (extword & 3) - 1;
264 sig = fetch_disp(frame, insn, bd_size, &basedisp);
265 if (sig) {
266 return sig;
268 if (od_size >= 0) {
269 ea->ea_flags |= EA_MEM_INDIR;
271 sig = fetch_disp(frame, insn, od_size, &outerdisp);
272 if (sig) {
273 return sig;
276 switch (extword & 0x44) {
277 case 0: /* preindexed */
278 ea->ea_basedisp = basedisp + idx;
279 ea->ea_outerdisp = outerdisp;
280 break;
281 case 4: /* postindexed */
282 ea->ea_basedisp = basedisp;
283 ea->ea_outerdisp = outerdisp + idx;
284 break;
285 case 0x40: /* no index */
286 ea->ea_basedisp = basedisp;
287 ea->ea_outerdisp = outerdisp;
288 break;
289 default:
290 #ifdef DEBUG
291 printf("decode_ea6: invalid indirect mode: ext word %04x\n",
292 extword);
293 #endif
294 return SIGILL;
295 break;
297 #if DEBUG_FPE
298 printf("decode_ea6: full ext idxreg=%d, basedisp=%x, outerdisp=%x\n",
299 ea->ea_idxreg, ea->ea_basedisp, ea->ea_outerdisp);
300 #endif
302 #if DEBUG_FPE
303 printf("decode_ea6: regnum=%d, flags=%x\n",
304 ea->ea_regnum, ea->ea_flags);
305 #endif
306 return 0;
310 * Load a value from an effective address.
311 * Returns zero on success, else signal number.
314 fpu_load_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, char *dst)
316 int *reg;
317 char *src;
318 int len, step;
319 int sig;
321 #ifdef DIAGNOSTIC
322 if (ea->ea_regnum & ~0xF) {
323 panic("load_ea: bad regnum");
325 #endif
327 #ifdef DEBUG_FPE
328 printf("load_ea: frame at %p\n", frame);
329 #endif
330 /* dst is always int or larger. */
331 len = insn->is_datasize;
332 if (len < 4) {
333 dst += (4 - len);
335 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len;
337 #if 0
338 if (ea->ea_flags & EA_FRAME_EA) {
339 /* Using LC040 frame EA */
340 #ifdef DEBUG_FPE
341 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) {
342 printf("load_ea: frame ea %08x w/r%d\n",
343 ea->ea_fea, ea->ea_regnum);
344 } else {
345 printf("load_ea: frame ea %08x\n", ea->ea_fea);
347 #endif
348 src = (char *)ea->ea_fea;
349 copyin(src + ea->ea_moffs, dst, len);
350 if (ea->ea_flags & EA_PREDECR) {
351 frame->f_regs[ea->ea_regnum] = ea->ea_fea;
352 ea->ea_fea -= step;
353 ea->ea_moffs = 0;
354 } else if (ea->ea_flags & EA_POSTINCR) {
355 ea->ea_fea += step;
356 frame->f_regs[ea->ea_regnum] = ea->ea_fea;
357 ea->ea_moffs = 0;
358 } else {
359 ea->ea_moffs += step;
361 /* That's it, folks */
362 } else
363 #endif
364 if (ea->ea_flags & EA_DIRECT) {
365 if (len > 4) {
366 #ifdef DEBUG
367 printf("load_ea: operand doesn't fit CPU reg\n");
368 #endif
369 return SIGILL;
371 if (ea->ea_moffs > 0) {
372 #ifdef DEBUG
373 printf("load_ea: more than one move from CPU reg\n");
374 #endif
375 return SIGILL;
377 src = (char *)&frame->f_regs[ea->ea_regnum];
378 /* The source is an int. */
379 if (len < 4) {
380 src += (4 - len);
381 #ifdef DEBUG_FPE
382 printf("load_ea: short/byte opr - addr adjusted\n");
383 #endif
385 #ifdef DEBUG_FPE
386 printf("load_ea: src %p\n", src);
387 #endif
388 memcpy(dst, src, len);
389 } else if (ea->ea_flags & EA_IMMED) {
390 #ifdef DEBUG_FPE
391 printf("load_ea: immed %08x%08x%08x size %d\n",
392 ea->ea_immed[0], ea->ea_immed[1], ea->ea_immed[2], len);
393 #endif
394 src = (char *)&ea->ea_immed[0];
395 if (len < 4) {
396 src += (4 - len);
397 #ifdef DEBUG_FPE
398 printf("load_ea: short/byte immed opr - addr adjusted\n");
399 #endif
401 memcpy(dst, src, len);
402 } else if (ea->ea_flags & EA_ABS) {
403 #ifdef DEBUG_FPE
404 printf("load_ea: abs addr %08x\n", ea->ea_absaddr);
405 #endif
406 src = (char *)ea->ea_absaddr;
407 copyin(src, dst, len);
408 } else /* register indirect */ {
409 if (ea->ea_flags & EA_PC_REL) {
410 #ifdef DEBUG_FPE
411 printf("load_ea: using PC\n");
412 #endif
413 reg = NULL;
414 /* Grab the register contents. 4 is offset to the first
415 extension word from the opcode */
416 src = (char *)insn->is_pc + 4;
417 #ifdef DEBUG_FPE
418 printf("load_ea: pc relative pc+4 = %p\n", src);
419 #endif
420 } else /* not PC relative */ {
421 #ifdef DEBUG_FPE
422 printf("load_ea: using register %c%d\n",
423 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7);
424 #endif
425 /* point to the register */
426 reg = &frame->f_regs[ea->ea_regnum];
428 if (ea->ea_flags & EA_PREDECR) {
429 #ifdef DEBUG_FPE
430 printf("load_ea: predecr mode - reg decremented\n");
431 #endif
432 *reg -= step;
433 ea->ea_moffs = 0;
436 /* Grab the register contents. */
437 src = (char *)*reg;
438 #ifdef DEBUG_FPE
439 printf("load_ea: reg indirect reg = %p\n", src);
440 #endif
443 sig = calc_ea(ea, src, &src);
444 if (sig)
445 return sig;
447 copyin(src + ea->ea_moffs, dst, len);
449 /* do post-increment */
450 if (ea->ea_flags & EA_POSTINCR) {
451 if (ea->ea_flags & EA_PC_REL) {
452 #ifdef DEBUG
453 printf("load_ea: tried to postincrement PC\n");
454 #endif
455 return SIGILL;
457 *reg += step;
458 ea->ea_moffs = 0;
459 #ifdef DEBUG_FPE
460 printf("load_ea: postinc mode - reg incremented\n");
461 #endif
462 } else {
463 ea->ea_moffs += len;
467 return 0;
471 * Store a value at the effective address.
472 * Returns zero on success, else signal number.
475 fpu_store_ea(struct frame *frame, struct instruction *insn, struct insn_ea *ea, char *src)
477 int *reg;
478 char *dst;
479 int len, step;
480 int sig;
482 #ifdef DIAGNOSTIC
483 if (ea->ea_regnum & ~0xf) {
484 panic("store_ea: bad regnum");
486 #endif
488 if (ea->ea_flags & (EA_IMMED|EA_PC_REL)) {
489 /* not alterable address mode */
490 #ifdef DEBUG
491 printf("store_ea: not alterable address mode\n");
492 #endif
493 return SIGILL;
496 /* src is always int or larger. */
497 len = insn->is_datasize;
498 if (len < 4) {
499 src += (4 - len);
501 step = (len == 1 && ea->ea_regnum == 15 /* sp */) ? 2 : len;
503 if (ea->ea_flags & EA_FRAME_EA) {
504 /* Using LC040 frame EA */
505 #ifdef DEBUG_FPE
506 if (ea->ea_flags & (EA_PREDECR|EA_POSTINCR)) {
507 printf("store_ea: frame ea %08x w/r%d\n",
508 ea->ea_fea, ea->ea_regnum);
509 } else {
510 printf("store_ea: frame ea %08x\n", ea->ea_fea);
512 #endif
513 dst = (char *)ea->ea_fea;
514 copyout(src, dst + ea->ea_moffs, len);
515 if (ea->ea_flags & EA_PREDECR) {
516 frame->f_regs[ea->ea_regnum] = ea->ea_fea;
517 ea->ea_fea -= step;
518 ea->ea_moffs = 0;
519 } else if (ea->ea_flags & EA_POSTINCR) {
520 ea->ea_fea += step;
521 frame->f_regs[ea->ea_regnum] = ea->ea_fea;
522 ea->ea_moffs = 0;
523 } else {
524 ea->ea_moffs += step;
526 /* That's it, folks */
527 } else if (ea->ea_flags & EA_ABS) {
528 #ifdef DEBUG_FPE
529 printf("store_ea: abs addr %08x\n", ea->ea_absaddr);
530 #endif
531 dst = (char *)ea->ea_absaddr;
532 copyout(src, dst + ea->ea_moffs, len);
533 ea->ea_moffs += len;
534 } else if (ea->ea_flags & EA_DIRECT) {
535 if (len > 4) {
536 #ifdef DEBUG
537 printf("store_ea: operand doesn't fit CPU reg\n");
538 #endif
539 return SIGILL;
541 if (ea->ea_moffs > 0) {
542 #ifdef DEBUG
543 printf("store_ea: more than one move to CPU reg\n");
544 #endif
545 return SIGILL;
547 dst = (char*)&frame->f_regs[ea->ea_regnum];
548 /* The destination is an int. */
549 if (len < 4) {
550 dst += (4 - len);
551 #ifdef DEBUG_FPE
552 printf("store_ea: short/byte opr - dst addr adjusted\n");
553 #endif
555 #ifdef DEBUG_FPE
556 printf("store_ea: dst %p\n", dst);
557 #endif
558 memcpy(dst, src, len);
559 } else /* One of MANY indirect forms... */ {
560 #ifdef DEBUG_FPE
561 printf("store_ea: using register %c%d\n",
562 (ea->ea_regnum >= 8) ? 'a' : 'd', ea->ea_regnum & 7);
563 #endif
564 /* point to the register */
565 reg = &(frame->f_regs[ea->ea_regnum]);
567 /* do pre-decrement */
568 if (ea->ea_flags & EA_PREDECR) {
569 #ifdef DEBUG_FPE
570 printf("store_ea: predecr mode - reg decremented\n");
571 #endif
572 *reg -= step;
573 ea->ea_moffs = 0;
576 /* calculate the effective address */
577 sig = calc_ea(ea, (char *)*reg, &dst);
578 if (sig)
579 return sig;
581 #ifdef DEBUG_FPE
582 printf("store_ea: dst addr=%p+%d\n", dst, ea->ea_moffs);
583 #endif
584 copyout(src, dst + ea->ea_moffs, len);
586 /* do post-increment */
587 if (ea->ea_flags & EA_POSTINCR) {
588 *reg += step;
589 ea->ea_moffs = 0;
590 #ifdef DEBUG_FPE
591 printf("store_ea: postinc mode - reg incremented\n");
592 #endif
593 } else {
594 ea->ea_moffs += len;
598 return 0;
602 * fetch_immed: fetch immediate operand
604 static int
605 fetch_immed(struct frame *frame, struct instruction *insn, int *dst)
607 int data, ext_bytes;
609 ext_bytes = insn->is_datasize;
611 if (0 < ext_bytes) {
612 data = fusword((void *) (insn->is_pc + insn->is_advance));
613 if (data < 0) {
614 return SIGSEGV;
616 if (ext_bytes == 1) {
617 /* sign-extend byte to long */
618 data &= 0xff;
619 if (data & 0x80) {
620 data |= 0xffffff00;
622 } else if (ext_bytes == 2) {
623 /* sign-extend word to long */
624 data &= 0xffff;
625 if (data & 0x8000) {
626 data |= 0xffff0000;
629 insn->is_advance += 2;
630 dst[0] = data;
632 if (2 < ext_bytes) {
633 data = fusword((void *) (insn->is_pc + insn->is_advance));
634 if (data < 0) {
635 return SIGSEGV;
637 insn->is_advance += 2;
638 dst[0] <<= 16;
639 dst[0] |= data;
641 if (4 < ext_bytes) {
642 data = fusword((void *) (insn->is_pc + insn->is_advance));
643 if (data < 0) {
644 return SIGSEGV;
646 dst[1] = data << 16;
647 data = fusword((void *) (insn->is_pc + insn->is_advance + 2));
648 if (data < 0) {
649 return SIGSEGV;
651 insn->is_advance += 4;
652 dst[1] |= data;
654 if (8 < ext_bytes) {
655 data = fusword((void *) (insn->is_pc + insn->is_advance));
656 if (data < 0) {
657 return SIGSEGV;
659 dst[2] = data << 16;
660 data = fusword((void *) (insn->is_pc + insn->is_advance + 2));
661 if (data < 0) {
662 return SIGSEGV;
664 insn->is_advance += 4;
665 dst[2] |= data;
668 return 0;
672 * fetch_disp: fetch displacement in full extension words
674 static int
675 fetch_disp(struct frame *frame, struct instruction *insn, int size, int *res)
677 int disp, word;
679 if (size == 1) {
680 word = fusword((void *) (insn->is_pc + insn->is_advance));
681 if (word < 0) {
682 return SIGSEGV;
684 disp = word & 0xffff;
685 if (disp & 0x8000) {
686 /* sign-extend */
687 disp |= 0xffff0000;
689 insn->is_advance += 2;
690 } else if (size == 2) {
691 word = fusword((void *) (insn->is_pc + insn->is_advance));
692 if (word < 0) {
693 return SIGSEGV;
695 disp = word << 16;
696 word = fusword((void *) (insn->is_pc + insn->is_advance + 2));
697 if (word < 0) {
698 return SIGSEGV;
700 disp |= (word & 0xffff);
701 insn->is_advance += 4;
702 } else {
703 disp = 0;
705 *res = disp;
706 return 0;
710 * Calculates an effective address for all address modes except for
711 * register direct, absolute, and immediate modes. However, it does
712 * not take care of predecrement/postincrement of register content.
713 * Returns a signal value (0 == no error).
715 static int
716 calc_ea(struct insn_ea *ea, char *ptr, char **eaddr)
717 /* ptr: base address (usually a register content) */
718 /* eaddr: pointer to result pointer */
720 int data, word;
722 #if DEBUG_FPE
723 printf("calc_ea: reg indirect (reg) = %p\n", ptr);
724 #endif
726 if (ea->ea_flags & EA_OFFSET) {
727 /* apply the signed offset */
728 #if DEBUG_FPE
729 printf("calc_ea: offset %d\n", ea->ea_offset);
730 #endif
731 ptr += ea->ea_offset;
732 } else if (ea->ea_flags & EA_INDEXED) {
733 #if DEBUG_FPE
734 printf("calc_ea: indexed mode\n");
735 #endif
737 if (ea->ea_flags & EA_BASE_SUPPRSS) {
738 /* base register is suppressed */
739 ptr = (char *)ea->ea_basedisp;
740 } else {
741 ptr += ea->ea_basedisp;
744 if (ea->ea_flags & EA_MEM_INDIR) {
745 #if DEBUG_FPE
746 printf("calc_ea: mem indir mode: basedisp=%08x, outerdisp=%08x\n",
747 ea->ea_basedisp, ea->ea_outerdisp);
748 printf("calc_ea: addr fetched from %p\n", ptr);
749 #endif
750 /* memory indirect modes */
751 word = fusword(ptr);
752 if (word < 0) {
753 return SIGSEGV;
755 word <<= 16;
756 data = fusword(ptr + 2);
757 if (data < 0) {
758 return SIGSEGV;
760 word |= data;
761 #if DEBUG_FPE
762 printf("calc_ea: fetched ptr 0x%08x\n", word);
763 #endif
764 ptr = (char *)word + ea->ea_outerdisp;
768 *eaddr = ptr;
770 return 0;