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[netbsd-mini2440.git] / sys / arch / m68k / fpsp / l_fpsp.h
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1 * $NetBSD$
3 * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
4 * M68000 Hi-Performance Microprocessor Division
5 * M68040 Software Package
7 * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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30 * No licenses are granted by implication, estoppel or otherwise
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34 * l_fpsp.h 1.2 5/1/91
37 * l_fpsp.h --- stack frame offsets for library version of FPSP
39 * This file is derived from fpsp.h. All equates that refer
40 * to the fsave frame and it's bits are removed with the
41 * exception of ETEMP, WBTEMP, DTAG and STAG which are simulated
42 * in the library version. Equates for the exception frame are
43 * also not needed. Some of the equates that are only used in
44 * the kernel version of the FPSP are left in to minimize the
45 * differences between this file and the original.
47 * The library routines use the same source files as the regular
48 * kernel mode code so they expect the same setup. That is, you
49 * must create enough space on the stack for all save areas and
50 * work variables that are needed, and save any registers that
51 * your compiler does not treat as scratch registers on return
52 * from function calls.
54 * The worst case setup is:
56 * link a6,#-LOCAL_SIZE
57 * movem.l d0-d1/a0-a1,USER_DA(a6)
58 * fmovem.x fp0-fp3,USER_FP0(a6)
59 * fmovem.l fpsr/fpcr,USER_FPSR(a6)
61 * After initialization, the stack looks like this:
63 * A7 ---> +-------------------------------+
64 * | |
65 * | FPSP Local Variables |
66 * | including |
67 * | saved registers |
68 * | |
69 * +-------------------------------+
70 * A6 ---> | Saved A6 |
71 * +-------------------------------+
72 * | Return PC |
73 * +-------------------------------+
74 * | Arguments to |
75 * | an FPSP library |
76 * | package |
77 * | |
79 * Positive offsets from A6 refer to the input arguments. Negative
80 * offsets refer to the Local Variable area.
82 * On exit, execute:
84 * movem.l USER_DA(a6),d0-d1/a0-a1
85 * fmovem.x USER_FP0(a6),fp0-fp3
86 * fmove.l USER_FPSR(a6),fpsr/fpcr
87 * unlk a6
88 * rts
90 * Many 68K C compilers treat a0/a1/d0/d1/fp0/fp1 as scratch so
91 * a simplified setup/exit is possible:
93 * link a6,#-LOCAL_SIZE
94 * fmovem.x fp2-fp3,USER_FP2(a6)
95 * fmove.l fpsr/fpcr,USER_FPSR(a6)
97 * [call appropriate emulation routine]
99 * fmovem.x USER_FP2(a6),fp2-fp3
100 * fmove.l USER_FPSR(a6),fpsr/fpcr
101 * unlk a6
102 * rts
104 * Note that you must still save fp2/fp3 because the FPSP emulation
105 * routines expect fp0-fp3 as scratch registers. For all monadic
106 * entry points, the caller should save the fpcr in d1 and zero the
107 * real fpcr before calling the emulation routine. On return, the
108 * monadic emulation code will place the value supplied in d1 back
109 * into the fpcr and do a single floating point operation so that
110 * the final result will be correctly rounded and any specified
111 * exceptions will be generated.
113 *----------------------------------------------------------------------
115 * Local Variables on the stack
117 LOCAL_SIZE equ 228 ;bytes needed for local variables
118 LV equ -LOCAL_SIZE ;convenient base value
120 USER_DA equ LV+0 ;save space for D0-D1,A0-A1
121 USER_D0 equ LV+0 ;saved user D0
122 USER_D1 equ LV+4 ;saved user D1
123 USER_A0 equ LV+8 ;saved user A0
124 USER_A1 equ LV+12 ;saved user A1
125 USER_FP0 equ LV+16 ;saved user FP0
126 USER_FP1 equ LV+28 ;saved user FP1
127 USER_FP2 equ LV+40 ;saved user FP2
128 USER_FP3 equ LV+52 ;saved user FP3
129 USER_FPCR equ LV+64 ;saved user FPCR
130 FPCR_ENABLE equ USER_FPCR+2 ; FPCR exception enable
131 FPCR_MODE equ USER_FPCR+3 ; FPCR rounding mode control
132 USER_FPSR equ LV+68 ;saved user FPSR
133 FPSR_CC equ USER_FPSR+0 ; FPSR condition code
134 FPSR_QBYTE equ USER_FPSR+1 ; FPSR quotient
135 FPSR_EXCEPT equ USER_FPSR+2 ; FPSR exception
136 FPSR_AEXCEPT equ USER_FPSR+3 ; FPSR accrued exception
137 USER_FPIAR equ LV+72 ;saved user FPIAR
138 FP_SCR1 equ LV+76 ;room for a temporary float value
139 FP_SCR2 equ LV+92 ;room for a temporary float value
140 L_SCR1 equ LV+108 ;room for a temporary long value
141 L_SCR2 equ LV+112 ;room for a temporary long value
142 STORE_FLG equ LV+116
143 BINDEC_FLG equ LV+117 ;used in bindec
144 DNRM_FLG equ LV+118 ;used in res_func
145 RES_FLG equ LV+119 ;used in res_func
146 DY_MO_FLG equ LV+120 ;dyadic/monadic flag
147 UFLG_TMP equ LV+121 ;temporary for uflag errata
148 CU_ONLY equ LV+122 ;cu-only flag
149 VER_TMP equ LV+123 ;temp holding for version number
150 L_SCR3 equ LV+124 ;room for a temporary long value
151 FP_SCR3 equ LV+128 ;room for a temporary float value
152 FP_SCR4 equ LV+144 ;room for a temporary float value
153 FP_SCR5 equ LV+160 ;room for a temporary float value
154 FP_SCR6 equ LV+176
156 *--------------------------------------------------------------------------
158 STAG equ LV+192 ;source tag (1 byte)
160 DTAG equ LV+193 ;dest tag (1 byte)
162 FPTEMP equ LV+196 ;fptemp (12 bytes)
163 FPTEMP_EX equ FPTEMP ;fptemp sign and exponent (2 bytes)
164 FPTEMP_HI equ FPTEMP+4 ;fptemp mantissa [63:32] (4 bytes)
165 FPTEMP_LO equ FPTEMP+8 ;fptemp mantissa [31:00] (4 bytes)
167 FPTEMP_SGN equ FPTEMP+2 ;used to store sign
169 ETEMP equ LV+208 ;etemp (12 bytes)
170 ETEMP_EX equ ETEMP ;etemp sign and exponent (2 bytes)
171 ETEMP_HI equ ETEMP+4 ;etemp mantissa [63:32] (4 bytes)
172 ETEMP_LO equ ETEMP+8 ;etemp mantissa [31:00] (4 bytes)
174 ETEMP_SGN equ ETEMP+2 ;used to store sign
176 *--------------------------------------------------------------------------
178 * FPSR/FPCR bits
180 neg_bit equ 3 negative result
181 z_bit equ 2 zero result
182 inf_bit equ 1 infinity result
183 nan_bit equ 0 not-a-number result
185 q_sn_bit equ 7 sign bit of quotient byte
187 bsun_bit equ 7 branch on unordered
188 snan_bit equ 6 signalling nan
189 operr_bit equ 5 operand error
190 ovfl_bit equ 4 overflow
191 unfl_bit equ 3 underflow
192 dz_bit equ 2 divide by zero
193 inex2_bit equ 1 inexact result 2
194 inex1_bit equ 0 inexact result 1
196 aiop_bit equ 7 accrued illegal operation
197 aovfl_bit equ 6 accrued overflow
198 aunfl_bit equ 5 accrued underflow
199 adz_bit equ 4 accrued divide by zero
200 ainex_bit equ 3 accrued inexact
202 * FPSR individual bit masks
204 neg_mask equ $08000000
205 z_mask equ $04000000
206 inf_mask equ $02000000
207 nan_mask equ $01000000
209 bsun_mask equ $00008000
210 snan_mask equ $00004000
211 operr_mask equ $00002000
212 ovfl_mask equ $00001000
213 unfl_mask equ $00000800
214 dz_mask equ $00000400
215 inex2_mask equ $00000200
216 inex1_mask equ $00000100
218 aiop_mask equ $00000080 accrued illegal operation
219 aovfl_mask equ $00000040 accrued overflow
220 aunfl_mask equ $00000020 accrued underflow
221 adz_mask equ $00000010 accrued divide by zero
222 ainex_mask equ $00000008 accrued inexact
224 * FPSR combinations used in the FPSP
226 dzinf_mask equ inf_mask+dz_mask+adz_mask
227 opnan_mask equ nan_mask+operr_mask+aiop_mask
228 nzi_mask equ $01ffffff clears N, Z, and I
229 unfinx_mask equ unfl_mask+inex2_mask+aunfl_mask+ainex_mask
230 unf2inx_mask equ unfl_mask+inex2_mask+ainex_mask
231 ovfinx_mask equ ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
232 inx1a_mask equ inex1_mask+ainex_mask
233 inx2a_mask equ inex2_mask+ainex_mask
234 snaniop_mask equ nan_mask+snan_mask+aiop_mask
235 naniop_mask equ nan_mask+aiop_mask
236 neginf_mask equ neg_mask+inf_mask
237 infaiop_mask equ inf_mask+aiop_mask
238 negz_mask equ neg_mask+z_mask
239 opaop_mask equ operr_mask+aiop_mask
240 unfl_inx_mask equ unfl_mask+aunfl_mask+ainex_mask
241 ovfl_inx_mask equ ovfl_mask+aovfl_mask+ainex_mask
243 *--------------------------------------------------------------------------
245 * FPCR rounding modes
247 x_mode equ $00 round to extended
248 s_mode equ $40 round to single
249 d_mode equ $80 round to double
251 rn_mode equ $00 round nearest
252 rz_mode equ $10 round to zero
253 rm_mode equ $20 round to minus infinity
254 rp_mode equ $30 round to plus infinity
256 *--------------------------------------------------------------------------
258 * Miscellaneous equates
260 signan_bit equ 6 signalling nan bit in mantissa
261 sign_bit equ 7
263 rnd_stky_bit equ 29 round/sticky bit of mantissa
264 * this can only be used if in a data register
265 LOCAL_EX equ 0
266 LOCAL_SGN equ 2
267 LOCAL_HI equ 4
268 LOCAL_LO equ 8
269 LOCAL_GRS equ 12 valid ONLY for FP_SCR1, FP_SCR2
272 norm_tag equ $00 tag bits in {7:5} position
273 zero_tag equ $20
274 inf_tag equ $40
275 nan_tag equ $60
276 dnrm_tag equ $80
278 dbl_thresh equ $3C01
279 sgl_thresh equ $3F81