sys/arch/m68k/include/pmap_motorola.h

   1 /*      $NetBSD: pmap_motorola.h,v 1.27 2009/12/11 18:57:44 tsutsui Exp $       */
   2
   3 /*
   4  * Copyright (c) 1991, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * the Systems Programming Group of the University of Utah Computer
   9  * Science Department.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  *      @(#)pmap.h      8.1 (Berkeley) 6/10/93
  36  */
  37
  38 /*
  39  * Copyright (c) 1987 Carnegie-Mellon University
  40  *
  41  * This code is derived from software contributed to Berkeley by
  42  * the Systems Programming Group of the University of Utah Computer
  43  * Science Department.
  44  *
  45  * Redistribution and use in source and binary forms, with or without
  46  * modification, are permitted provided that the following conditions
  47  * are met:
  48  * 1. Redistributions of source code must retain the above copyright
  49  *    notice, this list of conditions and the following disclaimer.
  50  * 2. Redistributions in binary form must reproduce the above copyright
  51  *    notice, this list of conditions and the following disclaimer in the
  52  *    documentation and/or other materials provided with the distribution.
  53  * 3. All advertising materials mentioning features or use of this software
  54  *    must display the following acknowledgement:
  55  *      This product includes software developed by the University of
  56  *      California, Berkeley and its contributors.
  57  * 4. Neither the name of the University nor the names of its contributors
  58  *    may be used to endorse or promote products derived from this software
  59  *    without specific prior written permission.
  60  *
  61  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  62  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  63  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  64  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  65  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  66  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  67  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  68  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  69  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  70  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  71  * SUCH DAMAGE.
  72  *
  73  *      @(#)pmap.h      8.1 (Berkeley) 6/10/93
  74  */
  75
  76 #ifndef _M68K_PMAP_MOTOROLA_H_
  77 #define _M68K_PMAP_MOTOROLA_H_
  78
  79 #include <sys/simplelock.h>
  80 #include <machine/cpu.h>
  81 #include <machine/pte.h>
  82
  83 /*
  84  * Pmap stuff
  85  */
  86 struct pmap {
  87         pt_entry_t              *pm_ptab;       /* KVA of page table */
  88         st_entry_t              *pm_stab;       /* KVA of segment table */
  89         u_int                   pm_stfree;      /* 040: free lev2 blocks */
  90         st_entry_t              *pm_stpa;       /* 040: ST phys addr */
  91         uint16_t                pm_sref;        /* segment table ref count */
  92         uint16_t                pm_count;       /* pmap reference count */
  93         struct simplelock       pm_lock;        /* lock on pmap */
  94         struct pmap_statistics  pm_stats;       /* pmap statistics */
  95         int                     pm_ptpages;     /* more stats: PT pages */
  96 };
  97
  98 /*
  99  * MMU specific segment values
 100  *
 101  * We are using following segment layout in m68k pmap_motorola.c:
 102  * 68020/030 4KB/page: l1,l2,page    == 10,10,12        (%tc = 0x82c0aa00)
 103  * 68020/030 8KB/page: l1,l2,page    ==  8,11,13        (%tc = 0x82d08b00)
 104  * 68040/060 4KB/page: l1,l2,l3,page == 7,7,6,12        (%tc = 0x8000)
 105  * 68040/060 8KB/page: l1,l2,l3,page == 7,7,5,13        (%tc = 0xc000)
 106  *
 107  * 68020/030 l2 size is chosen per NPTEPG, a number of page table entries
 108  * per page, to use one whole page for PTEs per one segment table entry,
 109  * and maybe also because 68020 HP MMU machines use simlar structures.
 110  *
 111  * 68040/060 layout is defined by hardware design and not configurable,
 112  * as defined in <m68k/pte_motorola.h>.
 113  *
 114  * Even on 68040/060, we still appropriate 2-level ste-pte pmap structures
 115  * for 68020/030 (derived from 4.4BSD/hp300) to handle 040's 3-level MMU.
 116  * TIA_SIZE and TIB_SIZE are used to represent such pmap structures and
 117  * they are also refered on 040/060.
 118  *
 119  * NBSEG and SEGOFSET are used to check l2 STE of the specified VA,
 120  * so they have different values between 020/030 and 040/060.
 121  */
 122                                                         /*  8KB /  4KB  */
 123 #define TIB_SHIFT       (PG_SHIFT - 2)                  /*   11 /   10  */
 124 #define TIB_SIZE        (1U << TIB_SHIFT)               /* 2048 / 1024  */
 125 #define TIA_SHIFT       (32 - TIB_SHIFT - PG_SHIFT)     /*    8 /   10  */
 126 #define TIA_SIZE        (1U << TIA_SHIFT)               /*  256 / 1024  */
 127
 128 #define SEGSHIFT        (TIB_SHIFT + PG_SHIFT)          /*   24 /   22  */
 129
 130 #define NBSEG30         (1U << SEGSHIFT)
 131 #define NBSEG40         (1U << SG4_SHIFT2)
 132
 133 #if   ( defined(M68020) ||  defined(M68030)) && \
 134       (!defined(M68040) && !defined(M68060))
 135 #define NBSEG           NBSEG30
 136 #elif ( defined(M68040) ||  defined(M68060)) && \
 137       (!defined(M68020) && !defined(M68030))
 138 #define NBSEG           NBSEG40
 139 #else
 140 #define NBSEG           ((mmutype == MMU_68040) ? NBSEG40 : NBSEG30)
 141 #endif
 142
 143 #define SEGOFSET        (NBSEG - 1)     /* byte offset into segment */
 144
 145 #define m68k_round_seg(x)       ((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET)
 146 #define m68k_trunc_seg(x)       ((vaddr_t)(x) & ~SEGOFSET)
 147 #define m68k_seg_offset(x)      ((vaddr_t)(x) & SEGOFSET)
 148
 149 /*
 150  * On the 040, we keep track of which level 2 blocks are already in use
 151  * with the pm_stfree mask.  Bits are arranged from LSB (block 0) to MSB
 152  * (block 31).  For convenience, the level 1 table is considered to be
 153  * block 0.
 154  *
 155  * MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed
 156  * for the kernel and users.
 157  * 16 or 8 implies only the initial "segment table" page is used,
 158  * i.e. it means PAGE_SIZE / (SG4_LEV1SIZE * sizeof(st_entry_t)).
 159  * WARNING: don't change MAXUL2SIZE unless you can allocate
 160  * physically contiguous pages for the ST in pmap_motorola.c!
 161  */
 162 #define MAXKL2SIZE      32
 163 #if PAGE_SIZE == 8192   /* NBPG / (SG4_LEV1SIZE * sizeof(st_entry_t)) */
 164 #define MAXUL2SIZE      16
 165 #else
 166 #define MAXUL2SIZE      8
 167 #endif
 168 #define l2tobm(n)       (1U << (n))
 169 #define bmtol2(n)       (ffs(n) - 1)
 170
 171 /*
 172  * Macros for speed
 173  */
 174 #define PMAP_ACTIVATE(pmap, loadhw)                                     \
 175 {                                                                       \
 176         if ((loadhw))                                                   \
 177                 loadustp(m68k_btop((paddr_t)(pmap)->pm_stpa));          \
 178 }
 179
 180 /*
 181  * For each struct vm_page, there is a list of all currently valid virtual
 182  * mappings of that page.  An entry is a pv_entry, the list is pv_table.
 183  */
 184 struct pv_entry {
 185         struct pv_entry *pv_next;       /* next pv_entry */
 186         struct pmap     *pv_pmap;       /* pmap where mapping lies */
 187         vaddr_t         pv_va;          /* virtual address for mapping */
 188         st_entry_t      *pv_ptste;      /* non-zero if VA maps a PT page */
 189         struct pmap     *pv_ptpmap;     /* if pv_ptste, pmap for PT page */
 190 };
 191
 192 struct pv_page;
 193
 194 struct pv_page_info {
 195         TAILQ_ENTRY(pv_page) pgi_list;
 196         struct pv_entry *pgi_freelist;
 197         int pgi_nfree;
 198 };
 199
 200 /*
 201  * This is basically:
 202  * ((PAGE_SIZE - sizeof(struct pv_page_info)) / sizeof(struct pv_entry))
 203  */
 204 #if PAGE_SIZE == 8192
 205 #define NPVPPG  340
 206 #else
 207 #define NPVPPG  170
 208 #endif
 209
 210 struct pv_page {
 211         struct pv_page_info pvp_pgi;
 212         struct pv_entry pvp_pv[NPVPPG];
 213 };
 214
 215 #define active_pmap(pm) \
 216         ((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
 217 #define active_user_pmap(pm) \
 218         (curproc && \
 219          (pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap)
 220
 221 extern struct pv_header *pv_table;      /* array of entries, one per page */
 222
 223 #define pmap_resident_count(pmap)       ((pmap)->pm_stats.resident_count)
 224 #define pmap_wired_count(pmap)          ((pmap)->pm_stats.wired_count)
 225
 226 #define pmap_update(pmap)               /* nothing (yet) */
 227
 228 static __inline void
 229 pmap_remove_all(struct pmap *pmap)
 230 {
 231         /* Nothing. */
 232 }
 233
 234 extern paddr_t          Sysseg_pa;
 235 extern st_entry_t       *Sysseg;
 236 extern pt_entry_t       *Sysmap, *Sysptmap;
 237 #define SYSMAP_VA       VM_MAX_KERNEL_ADDRESS
 238 extern vsize_t          Sysptsize;
 239 extern vsize_t          mem_size;
 240 extern vaddr_t          virtual_avail, virtual_end;
 241 extern u_int            protection_codes[];
 242 #if defined(M68040) || defined(M68060)
 243 extern u_int            protostfree;
 244 #endif
 245
 246 extern char             *vmmap;         /* map for mem, dumps, etc. */
 247 extern void             *CADDR1, *CADDR2;
 248 extern void             *msgbufaddr;
 249
 250 /* for lwp0 uarea initialization after MMU enabled */
 251 extern vaddr_t          lwp0uarea;
 252 void    pmap_bootstrap_finalize(void);
 253
 254 vaddr_t pmap_map(vaddr_t, paddr_t, paddr_t, int);
 255 void    pmap_procwr(struct proc *, vaddr_t, size_t);
 256 #define PMAP_NEED_PROCWR
 257
 258 #ifdef CACHE_HAVE_VAC
 259 void    pmap_prefer(vaddr_t, vaddr_t *);
 260 #define PMAP_PREFER(foff, vap, sz, td)  pmap_prefer((foff), (vap))
 261 #endif
 262
 263 void    _pmap_set_page_cacheable(struct pmap *, vaddr_t);
 264 void    _pmap_set_page_cacheinhibit(struct pmap *, vaddr_t);
 265 int     _pmap_page_is_cacheable(struct pmap *, vaddr_t);
 266
 267 #endif /* !_M68K_PMAP_MOTOROLA_H_ */