sys/arch/mips/alchemy/au_cpureg_mem.c

   1 /* $NetBSD: au_cpureg_mem.c,v 1.4 2006/02/04 03:33:16 gdamore Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Jason R. Thorpe.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Platform-specific SOC register support for the Alchemy Semiconductor Au1X00.
  34  */
  35
  36 #include <sys/cdefs.h>
  37 __KERNEL_RCSID(0, "$NetBSD: au_cpureg_mem.c,v 1.4 2006/02/04 03:33:16 gdamore Exp $");
  38
  39 #include <sys/param.h>
  40
  41 #include <machine/bus.h>
  42 #include <mips/alchemy/include/auvar.h>
  43 #include <mips/alchemy/include/aubusvar.h>
  44
  45 #define CHIP                    au_cpureg
  46 #define CHIP_MEM                /* defined */
  47 #define CHIP_ACCESS_SIZE        4
  48
  49 /* MEM region 1 */
  50 #define CHIP_W1_BUS_START(v)    0x00000000UL
  51 #define CHIP_W1_BUS_END(v)      0x1fffffffUL
  52 #define CHIP_W1_SYS_START(v)    0UL
  53 #define CHIP_W1_SYS_END(v)      CHIP_W1_BUS_END(v)
  54
  55 #include <mips/mips/bus_space_alignstride_chipdep.c>