sys/arch/mips/alchemy/include/au_himem_space.h

   1 /* $NetBSD: au_wired_space.h,v 1.1 2006/02/06 03:07:44 gdamore Exp $ */
   2
   3 /*-
   4  * Copyright (c) 2006 Itronix Inc.
   5  * All rights reserved.
   6  *
   7  * Written by Garrett D'Amore for Itronix Inc.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. The name of Itronix Inc. may not be used to endorse
  18  *    or promote products derived from this software without specific
  19  *    prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
  22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
  25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28  * ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #ifndef _MIPS_ALCHEMY_AU_HIMEM_SPACE_H_
  35 #define _MIPS_ALCHEMY_AU_HIMEM_SPACE_H_
  36
  37 /* bus endianness */
  38 #define AU_HIMEM_SPACE_BIG_ENDIAN       (1 << 0)
  39 #define AU_HIMEM_SPACE_LITTLE_ENDIAN    (1 << 1)
  40
  41 /* endian swapping done in hardware? */
  42 #define AU_HIMEM_SPACE_SWAP_HW          (1 << 2)
  43
  44 /* chip type */
  45 #define AU_HIMEM_SPACE_IO               (1 << 3)        /* no linear mapping */
  46
  47 extern void au_himem_space_init(bus_space_tag_t, const char *, paddr_t,
  48     bus_addr_t, bus_addr_t, int);
  49
  50 #endif /* _MIPS_ALCHEMY_AU_WIRED_SPACE_H_ */