sys/arch/mips/include/mips1_pte.h

   1 /*      $NetBSD: mips1_pte.h,v 1.15.38.1 2007/10/03 19:24:21 garbled Exp $      */
   2
   3 /*
   4  * Copyright (c) 1992, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * the Systems Programming Group of the University of Utah Computer
   9  * Science Department and Ralph Campbell.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  * from: Utah Hdr: pte.h 1.11 89/09/03
  36  *
  37  *      @(#)pte.h       8.1 (Berkeley) 6/10/93
  38  */
  39 /*
  40  * Copyright (c) 1988 University of Utah.
  41  *
  42  * This code is derived from software contributed to Berkeley by
  43  * the Systems Programming Group of the University of Utah Computer
  44  * Science Department and Ralph Campbell.
  45  *
  46  * Redistribution and use in source and binary forms, with or without
  47  * modification, are permitted provided that the following conditions
  48  * are met:
  49  * 1. Redistributions of source code must retain the above copyright
  50  *    notice, this list of conditions and the following disclaimer.
  51  * 2. Redistributions in binary form must reproduce the above copyright
  52  *    notice, this list of conditions and the following disclaimer in the
  53  *    documentation and/or other materials provided with the distribution.
  54  * 3. All advertising materials mentioning features or use of this software
  55  *    must display the following acknowledgement:
  56  *      This product includes software developed by the University of
  57  *      California, Berkeley and its contributors.
  58  * 4. Neither the name of the University nor the names of its contributors
  59  *    may be used to endorse or promote products derived from this software
  60  *    without specific prior written permission.
  61  *
  62  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  63  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  65  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  66  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  68  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  69  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  70  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  71  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  72  * SUCH DAMAGE.
  73  *
  74  * from: Utah Hdr: pte.h 1.11 89/09/03
  75  *
  76  *      @(#)pte.h       8.1 (Berkeley) 6/10/93
  77  */
  78
  79 /*
  80  * R2000 hardware page table entry
  81  */
  82
  83 #ifndef _LOCORE
  84 struct mips1_pte {
  85 #if BYTE_ORDER == BIG_ENDIAN
  86 unsigned int    pg_pfnum:20,            /* HW: core page frame number or 0 */
  87                 pg_n:1,                 /* HW: non-cacheable bit */
  88                 pg_m:1,                 /* HW: dirty bit */
  89                 pg_v:1,                 /* HW: valid bit */
  90                 pg_g:1,                 /* HW: ignore pid bit */
  91                 :4,
  92                 pg_swapm:1,             /* SW: page must be forced to swap */
  93                 pg_fod:1,               /* SW: is fill on demand (=0) */
  94                 pg_prot:2;              /* SW: access control */
  95 #endif
  96 #if BYTE_ORDER == LITTLE_ENDIAN
  97 unsigned int    pg_prot:2,              /* SW: access control */
  98                 pg_fod:1,               /* SW: is fill on demand (=0) */
  99                 pg_swapm:1,             /* SW: page must be forced to swap */
 100                 :4,
 101                 pg_g:1,                 /* HW: ignore pid bit */
 102                 pg_v:1,                 /* HW: valid bit */
 103                 pg_m:1,                 /* HW: dirty bit */
 104                 pg_n:1,                 /* HW: non-cacheable bit */
 105                 pg_pfnum:20;            /* HW: core page frame number or 0 */
 106 #endif
 107 };
 108 #endif /* _LOCORE */
 109
 110 #define MIPS1_PG_PROT   0x00000003
 111 #define MIPS1_PG_RW     0x00000000
 112 #define MIPS1_PG_RO     0x00000001
 113 #define MIPS1_PG_WIRED  0x00000002
 114 #define MIPS1_PG_G      0x00000100
 115 #define MIPS1_PG_V      0x00000200
 116 #define MIPS1_PG_NV     0x00000000
 117 #define MIPS1_PG_D      0x00000400
 118 #define MIPS1_PG_N      0x00000800
 119 #define MIPS1_PG_FRAME  0xfffff000
 120 #define MIPS1_PG_SHIFT  12
 121 #define MIPS1_PG_PFNUM(x) (((x) & MIPS1_PG_FRAME) >> MIPS1_PG_SHIFT)
 122
 123 #define MIPS1_PG_ROPAGE MIPS1_PG_V
 124 #define MIPS1_PG_RWPAGE MIPS1_PG_D
 125 #define MIPS1_PG_CWPAGE 0
 126 #define MIPS1_PG_RWNCPAGE       (MIPS1_PG_D | MIPS1_PG_N)
 127 #define MIPS1_PG_CWNCPAGE       MIPS1_PG_N
 128 #define MIPS1_PG_IOPAGE (MIPS1_PG_D | MIPS1_PG_N)
 129
 130 #define mips1_tlbpfn_to_paddr(x)        ((x) & MIPS1_PG_FRAME)
 131 #define mips1_paddr_to_tlbpfn(x)        (x)
 132
 133 #define MIPS1_PTE_TO_PADDR(pte) ((unsigned)(pte) & MIPS1_PG_FRAME)
 134 #define MIPS1_PAGE_IS_RDONLY(pte,va) ((int)(pte) & MIPS1_PG_RO)