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[netbsd-mini2440.git] / sys / arch / mipsco / include / bus.h
blobd9c1e63a16bdbc19643ad1dc3ca00d2446858cfa
1 /* $NetBSD: bus.h,v 1.19 2008/04/28 20:23:28 martin Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
35 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 * 3. All advertising materials mentioning features or use of this software
46 * must display the following acknowledgement:
47 * This product includes software developed by Christopher G. Demetriou
48 * for the NetBSD Project.
49 * 4. The name of the author may not be used to endorse or promote products
50 * derived from this software without specific prior written permission
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 */
63
64 #ifndef _MIPSCO_BUS_H_
65 #define _MIPSCO_BUS_H_
66 #ifdef _KERNEL
67
68 #include <mips/locore.h>
69
70 #ifdef BUS_SPACE_DEBUG
71 #include <sys/systm.h> /* for printf() prototype */
72 /*
73 * Macros for checking the aligned-ness of pointers passed to bus
74 * space ops. Strict alignment is required by the MIPS architecture,
75 * and a trap will occur if unaligned access is performed. These
76 * may aid in the debugging of a broken device driver by displaying
77 * useful information about the problem.
78 */
79 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
80 ((((u_long)(p)) & (sizeof(t)-1)) == 0)
81
82 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
83 ({ \
84 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
85 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
86 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
87 } \
88 (void) 0; \
89 })
90
91 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
92 #else
93 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
94 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
95 #endif /* BUS_SPACE_DEBUG */
96
97 /*
98 * Utility macro; do not use outside this file.
99 */
100 #ifdef __STDC__
101 #define __CONCAT3(a,b,c) a##b##c
102 #else
103 #define __CONCAT3(a,b,c) a/**/b/**/c
104 #endif
105
106 /*
107 * Bus address and size types
108 */
109 typedef u_long bus_addr_t;
110 typedef u_long bus_size_t;
111
112 /*
113 * Access methods for bus resources and address space.
114 */
115 typedef u_int32_t bus_space_handle_t;
116 typedef struct mipsco_bus_space *bus_space_tag_t;
117
118 struct mipsco_bus_space {
119 const char *bs_name;
120 struct extent *bs_extent;
121 bus_addr_t bs_start;
122 bus_size_t bs_size;
123
124 paddr_t bs_pbase;
125 vaddr_t bs_vbase;
126
127 u_int8_t bs_stride; /* log2(stride) */
128 u_int8_t bs_bswap; /* byte swap in stream methods */
129
130 u_int8_t bs_offset_1;
131 u_int8_t bs_offset_2;
132 u_int8_t bs_offset_4;
133 u_int8_t bs_offset_8;
134
135 /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */
136 int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t,
137 bus_size_t, int, bus_space_handle_t *);
138
139 /* dispose a bus_space handle (MD) */
140 int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t,
141 bus_size_t);
142
143 /* convert bus_space tag/handle to physical address (MD) */
144 int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t,
145 paddr_t *);
146
147 /* mapping/unmapping */
148 int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
149 bus_space_handle_t *);
150 void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t,
151 bus_size_t);
152 int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t,
153 bus_size_t, bus_size_t, bus_space_handle_t *);
154 paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
155
156
157 /* allocation/deallocation */
158 int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t,
159 bus_size_t, bus_size_t, bus_size_t, int,
160 bus_addr_t *, bus_space_handle_t *);
161 void (*bs_free)(bus_space_tag_t, bus_space_handle_t,
162 bus_size_t);
163
164 /* interrupt attach */
165 void (*bs_intr_establish)(
166 bus_space_tag_t,
167 int, /*bus-specific intr*/
168 int, /*priority/class*/
169 int, /*flags*/
170 int (*)(void *), /*handler*/
171 void *); /*handler arg*/
172
173 void *bs_aux;
174 };
175
176 /* vaddr_t argument of mipsco_bus_space_init() */
177 #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0)
178
179 /* machine dependent utility function for bus_space users */
180 void mipsco_bus_space_malloc_set_safe(void);
181 void mipsco_bus_space_init(bus_space_tag_t, const char *,
182 paddr_t, vaddr_t, bus_addr_t, bus_size_t);
183 void mipsco_bus_space_init_extent(bus_space_tag_t, void *, size_t);
184 void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int);
185 void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *,
186 paddr_t, bus_addr_t, bus_size_t);
187 void mipsco_large_bus_space_init(bus_space_tag_t, const char *,
188 paddr_t, bus_addr_t, bus_size_t);
189
190 /* machine dependent utility function for bus_space implementations */
191 int mipsco_bus_space_extent_malloc_flag(void);
192
193 /* these are provided for subclasses which override base bus_space. */
194
195 int mipsco_bus_space_compose_handle(bus_space_tag_t,
196 bus_addr_t, bus_size_t, int, bus_space_handle_t *);
197 int mipsco_bus_space_dispose_handle(bus_space_tag_t,
198 bus_space_handle_t, bus_size_t);
199 int mipsco_bus_space_paddr(bus_space_tag_t,
200 bus_space_handle_t, paddr_t *);
201
202 int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t,
203 bus_addr_t, bus_size_t, int, bus_space_handle_t *);
204 int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t,
205 bus_space_handle_t, bus_size_t);
206 int mipsco_sparse_bus_space_paddr(bus_space_tag_t,
207 bus_space_handle_t, paddr_t *);
208
209 int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
210 bus_space_handle_t *);
211 void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t,
212 bus_size_t);
213 int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
214 bus_size_t, bus_size_t, bus_space_handle_t *);
215 paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
216 int, int);
217 int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t,
218 bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *,
219 bus_space_handle_t *);
220 #define mipsco_bus_space_free mipsco_bus_space_unmap
221
222 /*
223 * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr,
224 * bus_size_t size, int flags, bus_space_handle_t *bshp);
225 *
226 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
227 * Compose a bus_space handle from tag/handle/addr/size/flags.
228 * A helper function for bus_space_map()/bus_space_alloc() implementation.
229 */
230 #define bus_space_compose_handle(bst, addr, size, flags, bshp) \
231 (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp)
232
233 /*
234 * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr,
235 * bus_space_handle_t bsh, bus_size_t size);
236 *
237 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
238 * Dispose a bus_space handle.
239 * A helper function for bus_space_unmap()/bus_space_free() implementation.
240 */
241 #define bus_space_dispose_handle(bst, bsh, size) \
242 (*(bst)->bs_dispose_handle)(bst, bsh, size)
243
244 /*
245 * int bus_space_paddr(bus_space_tag_t tag,
246 * bus_space_handle_t bsh, paddr_t *pap);
247 *
248 * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
249 * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha)
250 * Return physical address of a region.
251 * A helper function for device mmap entry.
252 */
253 #define bus_space_paddr(bst, bsh, pap) \
254 (*(bst)->bs_paddr)(bst, bsh, pap)
255
256 /*
257 * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
258 *
259 * Get the kernel virtual address for the mapped bus space.
260 * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
261 * (XXX not enforced)
262 */
263 #define bus_space_vaddr(bst, bsh) \
264 ((void *)(bsh))
265
266 /*
267 * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
268 * int, int);
269 *
270 * Mmap bus space on behalf of the user.
271 */
272 #define bus_space_mmap(bst, addr, off, prot, flags) \
273 (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags))
274
275 /*
276 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
277 * bus_size_t size, int flags, bus_space_handle_t *bshp);
278 *
279 * Map a region of bus space.
280 */
281
282 #define BUS_SPACE_MAP_CACHEABLE 0x01
283 #define BUS_SPACE_MAP_LINEAR 0x02
284 #define BUS_SPACE_MAP_PREFETCHABLE 0x04
285
286 #define bus_space_map(t, a, s, f, hp) \
287 (*(t)->bs_map)((t), (a), (s), (f), (hp))
288
289 /*
290 * void bus_space_unmap(bus_space_tag_t t,
291 * bus_space_handle_t bsh, bus_size_t size);
292 *
293 * Unmap a region of bus space.
294 */
295
296 #define bus_space_unmap(t, h, s) \
297 (*(t)->bs_unmap)((t), (h), (s))
298
299 /*
300 * int bus_space_subregion(bus_space_tag_t t,
301 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
302 * bus_space_handle_t *nbshp);
303 *
304 * Get a new handle for a subregion of an already-mapped area of bus space.
305 */
306
307 #define bus_space_subregion(t, h, o, s, hp) \
308 (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
309
310 /*
311 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
312 * bus_addr_t rend, bus_size_t size, bus_size_t align,
313 * bus_size_t boundary, int flags, bus_addr_t *addrp,
314 * bus_space_handle_t *bshp);
315 *
316 * Allocate a region of bus space.
317 */
318
319 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
320 (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp))
321
322 /*
323 * int bus_space_free(bus_space_tag_t t,
324 * bus_space_handle_t bsh, bus_size_t size);
325 *
326 * Free a region of bus space.
327 */
328
329 #define bus_space_free(t, h, s) \
330 (*(t)->bs_free)((t), (h), (s))
331
332 /*
333 * void bus_intr_establish(bus_space_tag_t bst,
334 * int level, int pri, int flags, int (*func)(void *)
335 * void *arg);
336 *
337 * Attach interrupt handler and softc argument
338 */
339
340 #define bus_intr_establish(t, i, c, f, ihf, iha) \
341 (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha))
342
343
344 /*
345 * Utility macros; do not use outside this file.
346 */
347 #define __BS_TYPENAME(BITS) __CONCAT3(u_int,BITS,_t)
348 #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride)
349 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES)
350
351 /*
352 * Calculate the target address using the bus_space parameters
353 */
354 #define __BS_ADDR(t, h, offset, BITS, BYTES) \
355 ((volatile __CONCAT3(u_int,BITS,_t) *) \
356 ((h) + __BS_OFFSET(t, offset, BYTES) + \
357 (t)->__CONCAT(bs_offset_,BYTES)))
358
359 /*
360 * u_intN_t bus_space_read_N(bus_space_tag_t tag,
361 * bus_space_handle_t bsh, bus_size_t offset);
362 *
363 * Read a 1, 2, 4, or 8 byte quantity from bus space
364 * described by tag/handle/offset.
365 */
366
367 #define __bus_space_read(BYTES,BITS) \
368 static __inline __CONCAT3(u_int,BITS,_t) \
369 __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \
370 bus_space_handle_t bsh, bus_size_t offset) \
371 { \
372 return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \
373 }
374
375 __bus_space_read(1,8)
376 __bus_space_read(2,16)
377 __bus_space_read(4,32)
378 __bus_space_read(8,64)
379
380 /*
381 * void bus_space_read_multi_N(bus_space_tag_t tag,
382 * bus_space_handle_t bsh, bus_size_t offset,
383 * u_intN_t *addr, size_t count);
384 *
385 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
386 * described by tag/handle/offset and copy into buffer provided.
387 */
388
389 #define __bus_space_read_multi(BYTES,BITS) \
390 static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \
391 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
392 __BS_TYPENAME(BITS) *, size_t); \
393 \
394 static __inline void \
395 __BS_FUNCTION(bus_space_read_multi,BYTES)(t, h, o, a, c) \
396 bus_space_tag_t t; \
397 bus_space_handle_t h; \
398 bus_size_t o; \
399 __BS_TYPENAME(BITS) *a; \
400 size_t c; \
401 { \
402 \
403 while (c--) \
404 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
405 }
406
407 __bus_space_read_multi(1,8)
408 __bus_space_read_multi(2,16)
409 __bus_space_read_multi(4,32)
410 __bus_space_read_multi(8,64)
411
412
413 /*
414 * void bus_space_read_region_N(bus_space_tag_t tag,
415 * bus_space_handle_t bsh, bus_size_t offset,
416 * u_intN_t *addr, size_t count);
417 *
418 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
419 * described by tag/handle and starting at `offset' and copy into
420 * buffer provided.
421 */
422
423 #define __bus_space_read_region(BYTES,BITS) \
424 static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \
425 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
426 __BS_TYPENAME(BITS) *, size_t); \
427 \
428 static __inline void \
429 __BS_FUNCTION(bus_space_read_region,BYTES)(t, h, o, a, c) \
430 bus_space_tag_t t; \
431 bus_space_handle_t h; \
432 bus_size_t o; \
433 __BS_TYPENAME(BITS) *a; \
434 size_t c; \
435 { \
436 \
437 while (c--) { \
438 *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
439 o += BYTES; \
440 } \
441 }
442
443 __bus_space_read_region(1,8)
444 __bus_space_read_region(2,16)
445 __bus_space_read_region(4,32)
446 __bus_space_read_region(8,64)
447
448
449 /*
450 * void bus_space_write_N(bus_space_tag_t tag,
451 * bus_space_handle_t bsh, bus_size_t offset,
452 * u_intN_t value);
453 *
454 * Write the 1, 2, 4, or 8 byte value `value' to bus space
455 * described by tag/handle/offset.
456 */
457
458 #define __bus_space_write(BYTES,BITS) \
459 static __inline void \
460 __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \
461 bus_space_handle_t bsh, \
462 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
463 { \
464 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \
465 wbflush(); \
466 }
467
468 __bus_space_write(1,8)
469 __bus_space_write(2,16)
470 __bus_space_write(4,32)
471 __bus_space_write(8,64)
472
473 /*
474 * void bus_space_write_multi_N(bus_space_tag_t tag,
475 * bus_space_handle_t bsh, bus_size_t offset,
476 * const u_intN_t *addr, size_t count);
477 *
478 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
479 * provided to bus space described by tag/handle/offset.
480 */
481
482 #define __bus_space_write_multi(BYTES,BITS) \
483 static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \
484 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
485 __BS_TYPENAME(BITS) *, size_t); \
486 \
487 static __inline void \
488 __BS_FUNCTION(bus_space_write_multi,BYTES)(t, h, o, a, c) \
489 bus_space_tag_t t; \
490 bus_space_handle_t h; \
491 bus_size_t o; \
492 __BS_TYPENAME(BITS) *a; \
493 size_t c; \
494 { \
495 \
496 while (c--) \
497 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
498 }
499
500 __bus_space_write_multi(1,8)
501 __bus_space_write_multi(2,16)
502 __bus_space_write_multi(4,32)
503 __bus_space_write_multi(8,64)
504
505
506 /*
507 * void bus_space_write_region_N(bus_space_tag_t tag,
508 * bus_space_handle_t bsh, bus_size_t offset,
509 * const u_intN_t *addr, size_t count);
510 *
511 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
512 * to bus space described by tag/handle starting at `offset'.
513 */
514
515 #define __bus_space_write_region(BYTES,BITS) \
516 static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \
517 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
518 const __BS_TYPENAME(BITS) *, size_t); \
519 \
520 static __inline void \
521 __BS_FUNCTION(bus_space_write_region,BYTES)(t, h, o, a, c) \
522 bus_space_tag_t t; \
523 bus_space_handle_t h; \
524 bus_size_t o; \
525 const __BS_TYPENAME(BITS) *a; \
526 size_t c; \
527 { \
528 \
529 while (c--) { \
530 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
531 o += BYTES; \
532 } \
533 }
534
535 __bus_space_write_region(1,8)
536 __bus_space_write_region(2,16)
537 __bus_space_write_region(4,32)
538 __bus_space_write_region(8,64)
539
540
541 /*
542 * void bus_space_set_multi_N(bus_space_tag_t tag,
543 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
544 * size_t count);
545 *
546 * Write the 1, 2, 4, or 8 byte value `val' to bus space described
547 * by tag/handle/offset `count' times.
548 */
549
550 #define __bus_space_set_multi(BYTES,BITS) \
551 static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \
552 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
553 __BS_TYPENAME(BITS), size_t); \
554 \
555 static __inline void \
556 __BS_FUNCTION(bus_space_set_multi,BYTES)(t, h, o, v, c) \
557 bus_space_tag_t t; \
558 bus_space_handle_t h; \
559 bus_size_t o; \
560 __BS_TYPENAME(BITS) v; \
561 size_t c; \
562 { \
563 \
564 while (c--) \
565 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
566 }
567
568 __bus_space_set_multi(1,8)
569 __bus_space_set_multi(2,16)
570 __bus_space_set_multi(4,32)
571 __bus_space_set_multi(8,64)
572
573
574 /*
575 * void bus_space_set_region_N(bus_space_tag_t tag,
576 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
577 * size_t count);
578 *
579 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
580 * by tag/handle starting at `offset'.
581 */
582
583 #define __bus_space_set_region(BYTES,BITS) \
584 static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \
585 (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
586 __BS_TYPENAME(BITS), size_t); \
587 \
588 static __inline void \
589 __BS_FUNCTION(bus_space_set_region,BYTES)(t, h, o, v, c) \
590 bus_space_tag_t t; \
591 bus_space_handle_t h; \
592 bus_size_t o; \
593 __BS_TYPENAME(BITS) v; \
594 size_t c; \
595 { \
596 \
597 while (c--) { \
598 __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
599 o += BYTES; \
600 } \
601 }
602
603 __bus_space_set_region(1,8)
604 __bus_space_set_region(2,16)
605 __bus_space_set_region(4,32)
606 __bus_space_set_region(8,64)
607
608
609 /*
610 * void bus_space_copy_region_N(bus_space_tag_t tag,
611 * bus_space_handle_t bsh1, bus_size_t off1,
612 * bus_space_handle_t bsh2, bus_size_t off2,
613 * bus_size_t count);
614 *
615 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
616 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
617 */
618
619 #define __bus_space_copy_region(BYTES) \
620 static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \
621 (bus_space_tag_t, \
622 bus_space_handle_t bsh1, bus_size_t off1, \
623 bus_space_handle_t bsh2, bus_size_t off2, \
624 bus_size_t count); \
625 \
626 static __inline void \
627 __BS_FUNCTION(bus_space_copy_region,BYTES)(t, h1, o1, h2, o2, c) \
628 bus_space_tag_t t; \
629 bus_space_handle_t h1, h2; \
630 bus_size_t o1, o2, c; \
631 { \
632 bus_size_t o; \
633 \
634 if ((h1 + o1) >= (h2 + o2)) { \
635 /* src after dest: copy forward */ \
636 for (o = 0; c != 0; c--, o += BYTES) \
637 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
638 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
639 } else { \
640 /* dest after src: copy backwards */ \
641 for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
642 __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
643 __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
644 } \
645 }
646
647 __bus_space_copy_region(1)
648 __bus_space_copy_region(2)
649 __bus_space_copy_region(4)
650 __bus_space_copy_region(8)
651
652
653 /*
654 * Operations which handle byte stream data on word access.
655 *
656 * These functions are defined to resolve endian mismatch, by either
657 * - When normal (i.e. stream-less) operations perform byte swap
658 * to resolve endian mismatch, these functions bypass the byte swap.
659 * or
660 * - When bus bridge performs automatic byte swap, these functions
661 * perform byte swap once more, to cancel the bridge's behavior.
662 *
663 * Mips Computer Systems platforms perform harware byte swapping -
664 * therefore the streaming methods can byte swap as determined from
665 * the bus space tag settings
666 *
667 */
668 #define __BUS_SPACE_HAS_STREAM_METHODS
669
670 /* Force creation of stream methods using the standard template macros */
671 #undef __BS_FUNCTION
672 #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES)
673
674 #define __BS_BSWAP(bst, val, BITS) \
675 ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val))
676
677
678 #define __bus_space_read_stream(BYTES,BITS) \
679 static __inline __BS_TYPENAME(BITS) \
680 __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \
681 bus_space_handle_t bsh, bus_size_t offset) \
682 { \
683 register __BS_TYPENAME(BITS) val = \
684 __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \
685 \
686 return __BS_BSWAP(bst, val, BITS); \
687 }
688
689 __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */
690 __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */
691 __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */
692
693
694 #define __bus_space_write_stream(BYTES,BITS) \
695 static __inline void \
696 __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \
697 bus_space_handle_t bsh, \
698 bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
699 { \
700 *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \
701 __BS_BSWAP(bst, data, BITS); \
702 wbflush(); \
703 }
704
705 __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */
706 __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */
707 __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */
708
709 __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */
710 __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */
711 __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */
712
713 __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */
714 __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */
715 __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */
716
717 __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */
718 __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */
719 __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */
720
721 __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */
722 __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */
723 __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */
724
725 __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */
726 __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */
727 __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */
728
729 __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */
730 __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */
731 __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */
732
733 #undef __bus_space_read
734 #undef __bus_space_write
735 #undef __bus_space_read_stream
736 #undef __bus_space_write_stream
737 #undef __bus_space_read_multi
738 #undef __bus_space_read_region
739 #undef __bus_space_write_multi
740 #undef __bus_space_write_region
741 #undef __bus_space_set_multi
742 #undef __bus_space_set_region
743 #undef __bus_space_copy_region
744
745 #undef __BS_TYPENAME
746 #undef __BS_OFFSET
747 #undef __BS_FUNCTION
748 #undef __BS_ADDR
749
750 /*
751 * Bus read/write barrier methods.
752 *
753 * void bus_space_barrier(bus_space_tag_t tag,
754 * bus_space_handle_t bsh, bus_size_t offset,
755 * bus_size_t len, int flags);
756 *
757 * On the MIPS, we just flush the write buffer.
758 */
759 #define bus_space_barrier(t, h, o, l, f) \
760 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \
761 wbflush()))
762
763 #define BUS_SPACE_BARRIER_READ 0x01
764 #define BUS_SPACE_BARRIER_WRITE 0x02
765
766 /*
767 * Flags used in various bus DMA methods.
768 */
769 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
770 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
771 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
772 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
773 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
774 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
775 #define BUS_DMA_BUS2 0x020
776 #define BUS_DMA_BUS3 0x040
777 #define BUS_DMA_BUS4 0x080
778 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
779 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
780 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
781
782 #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
783
784 /* Forwards needed by prototypes below. */
785 struct mbuf;
786 struct uio;
787
788 /*
789 * Operations performed by bus_dmamap_sync().
790 */
791 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
792 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
793 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
794 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
795
796 typedef struct mipsco_bus_dma_tag *bus_dma_tag_t;
797 typedef struct mipsco_bus_dmamap *bus_dmamap_t;
798
799 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
800
801 /*
802 * bus_dma_segment_t
803 *
804 * Describes a single contiguous DMA transaction. Values
805 * are suitable for programming into DMA registers.
806 */
807 struct mipsco_bus_dma_segment {
808 /*
809 * PUBLIC MEMBERS: these are used by device drivers.
810 */
811 bus_addr_t ds_addr; /* DMA address */
812 bus_size_t ds_len; /* length of transfer */
813 /*
814 * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers.
815 */
816 vaddr_t _ds_paddr; /* CPU physical address */
817 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */
818 };
819 typedef struct mipsco_bus_dma_segment bus_dma_segment_t;
820
821 /*
822 * bus_dma_tag_t
823 *
824 * A machine-dependent opaque type describing the implementation of
825 * DMA for a given bus.
826 */
827
828 struct mipsco_bus_dma_tag {
829 bus_addr_t dma_offset;
830
831 /*
832 * DMA mapping methods.
833 */
834 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
835 bus_size_t, bus_size_t, int, bus_dmamap_t *);
836 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
837 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
838 bus_size_t, struct proc *, int);
839 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
840 struct mbuf *, int);
841 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
842 struct uio *, int);
843 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
844 bus_dma_segment_t *, int, bus_size_t, int);
845 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
846 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
847 bus_addr_t, bus_size_t, int);
848
849 /*
850 * DMA memory utility functions.
851 */
852 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
853 bus_size_t, bus_dma_segment_t *, int, int *, int);
854 void (*_dmamem_free)(bus_dma_tag_t,
855 bus_dma_segment_t *, int);
856 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
857 int, size_t, void **, int);
858 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
859 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
860 int, off_t, int, int);
861 };
862
863 #define bus_dmamap_create(t, s, n, m, b, f, p) \
864 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
865 #define bus_dmamap_destroy(t, p) \
866 (*(t)->_dmamap_destroy)((t), (p))
867 #define bus_dmamap_load(t, m, b, s, p, f) \
868 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
869 #define bus_dmamap_load_mbuf(t, m, b, f) \
870 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
871 #define bus_dmamap_load_uio(t, m, u, f) \
872 (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
873 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
874 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
875 #define bus_dmamap_unload(t, p) \
876 (*(t)->_dmamap_unload)((t), (p))
877 #define bus_dmamap_sync(t, p, o, l, ops) \
878 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
879 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
880 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
881 #define bus_dmamem_free(t, sg, n) \
882 (*(t)->_dmamem_free)((t), (sg), (n))
883 #define bus_dmamem_map(t, sg, n, s, k, f) \
884 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
885 #define bus_dmamem_unmap(t, k, s) \
886 (*(t)->_dmamem_unmap)((t), (k), (s))
887 #define bus_dmamem_mmap(t, sg, n, o, p, f) \
888 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
889
890 #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
891 #define bus_dmatag_destroy(t)
892
893 /*
894 * bus_dmamap_t
895 *
896 * Describes a DMA mapping.
897 */
898 struct mipsco_bus_dmamap {
899 /*
900 * PRIVATE MEMBERS: not for use by machine-independent code.
901 */
902 bus_size_t _dm_size; /* largest DMA transfer mappable */
903 int _dm_segcnt; /* number of segs this map can map */
904 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
905 bus_size_t _dm_boundary; /* don't cross this */
906 int _dm_flags; /* misc. flags */
907
908 /*
909 * Private cookie to be used by the DMA back-end.
910 */
911 void *_dm_cookie;
912
913 /*
914 * PUBLIC MEMBERS: these are used by machine-independent code.
915 */
916 bus_size_t dm_maxsegsz; /* largest possible segment */
917 bus_size_t dm_mapsize; /* size of the mapping */
918 int dm_nsegs; /* # valid segments in mapping */
919 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
920 };
921
922 #ifdef _MIPSCO_BUS_DMA_PRIVATE
923 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
924 bus_size_t, int, bus_dmamap_t *);
925 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
926 int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
927 bus_size_t, struct proc *, int);
928 int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
929 struct mbuf *, int);
930 int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
931 struct uio *, int);
932 int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
933 bus_dma_segment_t *, int, bus_size_t, int);
934 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
935 void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
936 bus_size_t, int);
937
938 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
939 bus_size_t alignment, bus_size_t boundary,
940 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
941 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
942 bus_size_t alignment, bus_size_t boundary,
943 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
944 paddr_t low, paddr_t high);
945 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
946 int nsegs);
947 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
948 int nsegs, size_t size, void **kvap, int flags);
949 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
950 size_t size);
951 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
952 int nsegs, off_t off, int prot, int flags);
953
954 int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
955 bus_size_t alignment, bus_size_t boundary,
956 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
957 paddr_t low, paddr_t high);
958 #endif /* _MIPSCO_BUS_DMA_PRIVATE */
959
960 void _bus_dma_tag_init(bus_dma_tag_t tag);
961
962 #endif /* _KERNEL */
963 #endif /* _MIPSCO_BUS_H_ */
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