sys/arch/newsmips/dev/zs_hb.c

   1 /*      $NetBSD: zs_hb.c,v 1.24 2008/03/29 19:15:35 tsutsui Exp $       */
   2
   3 /*-
   4  * Copyright (c) 1996 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Gordon W. Ross.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Zilog Z8530 Dual UART driver (machine-dependent part)
  34  *
  35  * Runs two serial lines per chip using slave drivers.
  36  * Plain tty/async lines use the zs_async slave.
  37  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
  38  */
  39
  40 #include <sys/cdefs.h>
  41 __KERNEL_RCSID(0, "$NetBSD: zs_hb.c,v 1.24 2008/03/29 19:15:35 tsutsui Exp $");
  42
  43 #include <sys/param.h>
  44 #include <sys/systm.h>
  45 #include <sys/device.h>
  46 #include <sys/tty.h>
  47 #include <sys/conf.h>
  48 #include <sys/cpu.h>
  49 #include <sys/intr.h>
  50
  51 #include <machine/adrsmap.h>
  52 #include <machine/z8530var.h>
  53
  54 #include <dev/cons.h>
  55 #include <dev/ic/z8530reg.h>
  56
  57 #include <newsmips/dev/hbvar.h>
  58
  59 #include "zsc.h"        /* NZSC */
  60 #define NZS NZSC
  61
  62 /* Make life easier for the initialized arrays here. */
  63 #if NZS < 2
  64 #undef  NZS
  65 #define NZS 2
  66 #endif
  67
  68 #define ZSCFLAG_EX      0x01    /* expansion board */
  69
  70 /*
  71  * The news3400 provides a 4.9152 MHz clock to the ZS chips.
  72  */
  73 #define PCLK    (9600 * 512)    /* PCLK pin input clock rate */
  74 #define PCLK_EX (9600 * 384)
  75
  76 /*
  77  * Define interrupt levels.
  78  */
  79 #define ZSHARD_PRI 64
  80
  81 #define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
  82
  83 /* The layout of this is hardware-dependent (padding, order). */
  84 struct zschan {
  85         volatile uint8_t zc_csr;        /* ctrl,status, and indirect access */
  86         volatile uint8_t zc_data;       /* data */
  87 };
  88 struct zsdevice {
  89         /* Yes, they are backwards. */
  90         struct  zschan zs_chan_b;
  91         struct  zschan zs_chan_a;
  92 };
  93
  94 extern int zs_def_cflag;
  95
  96 static struct zsdevice *zsaddr[NZS];
  97
  98 /* Flags from cninit() */
  99 static int zs_hwflags[NZS][2];
 100
 101 /* Default speed for all channels */
 102 static int zs_defspeed = 9600;
 103
 104 static uint8_t zs_init_reg[16] = {
 105         0,      /* 0: CMD (reset, etc.) */
 106         0,      /* 1: No interrupts yet. */
 107         ZSHARD_PRI,     /* IVECT */
 108         ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
 109         ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
 110         ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
 111         0,      /* 6: TXSYNC/SYNCLO */
 112         0,      /* 7: RXSYNC/SYNCHI */
 113         0,      /* 8: alias for data port */
 114         ZSWR9_MASTER_IE,
 115         0,      /*10: Misc. TX/RX control bits */
 116         ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
 117         ((PCLK/32)/9600)-2,     /*12: BAUDLO (default=9600) */
 118         0,                      /*13: BAUDHI (default=9600) */
 119         ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
 120         ZSWR15_BREAK_IE,
 121 };
 122
 123 static struct zschan * zs_get_chan_addr(int, int);
 124 static void zs_hb_delay(void);
 125 static int zshard_hb(void *);
 126 static int zs_getc(void *);
 127 static void zs_putc(void *, int);
 128
 129 struct zschan *
 130 zs_get_chan_addr(int zs_unit, int channel)
 131 {
 132         struct zsdevice *addr;
 133         struct zschan *zc;
 134
 135         if (zs_unit >= NZS)
 136                 return NULL;
 137         addr = zsaddr[zs_unit];
 138         if (addr == NULL)
 139                 return NULL;
 140         if (channel == 0) {
 141                 zc = &addr->zs_chan_a;
 142         } else {
 143                 zc = &addr->zs_chan_b;
 144         }
 145         return zc;
 146 }
 147
 148 static void
 149 zs_hb_delay(void)
 150 {
 151
 152         ZS_DELAY();
 153 }
 154
 155 /****************************************************************
 156  * Autoconfig
 157  ****************************************************************/
 158
 159 /* Definition of the driver for autoconfig. */
 160 int zs_hb_match(device_t, cfdata_t, void *);
 161 void zs_hb_attach(device_t, device_t, void *);
 162
 163 CFATTACH_DECL_NEW(zsc_hb, sizeof(struct zsc_softc),
 164     zs_hb_match, zs_hb_attach, NULL, NULL);
 165
 166 /*
 167  * Is the zs chip present?
 168  */
 169 int
 170 zs_hb_match(device_t parent, cfdata_t cf, void *aux)
 171 {
 172         struct hb_attach_args *ha = aux;
 173
 174         if (strcmp(ha->ha_name, "zsc"))
 175                 return 0;
 176
 177         /* This returns -1 on a fault (bus error). */
 178         if (hb_badaddr((char *)ha->ha_addr, 1))
 179                 return 0;
 180
 181         return 1;
 182 }
 183
 184 /*
 185  * Attach a found zs.
 186  *
 187  * Match slave number to zs unit number, so that misconfiguration will
 188  * not set up the keyboard as ttya, etc.
 189  */
 190 void
 191 zs_hb_attach(device_t parent, device_t self, void *aux)
 192 {
 193         struct zsc_softc *zsc = device_private(self);
 194         struct hb_attach_args *ha = aux;
 195         struct zsc_attach_args zsc_args;
 196         volatile struct zschan *zc;
 197         struct zs_chanstate *cs;
 198         int s, zs_unit, channel, intlevel;
 199         static int didintr;
 200
 201         zsc->zsc_dev = self;
 202         zs_unit = device_unit(self);
 203         intlevel = ha->ha_level;
 204         zsaddr[zs_unit] = (void *)ha->ha_addr;
 205
 206         if (intlevel == -1) {
 207 #if 0
 208                 aprint_error(": interrupt level not configured\n");
 209                 return;
 210 #else
 211                 aprint_error(": interrupt level not configured; using");
 212                 intlevel = 1;
 213 #endif
 214         }
 215
 216         aprint_error(" level %d\n", intlevel);
 217
 218         zs_delay = zs_hb_delay;
 219
 220         /*
 221          * Initialize software state for each channel.
 222          */
 223         for (channel = 0; channel < 2; channel++) {
 224                 zsc_args.channel = channel;
 225                 zsc_args.hwflags = zs_hwflags[zs_unit][channel];
 226                 cs = &zsc->zsc_cs_store[channel];
 227                 zsc->zsc_cs[channel] = cs;
 228
 229                 zs_lock_init(cs);
 230                 cs->cs_channel = channel;
 231                 cs->cs_private = NULL;
 232                 cs->cs_ops = &zsops_null;
 233                 if ((device_cfdata(self)->cf_flags & ZSCFLAG_EX) == 0)
 234                         cs->cs_brg_clk = PCLK / 16;
 235                 else
 236                         cs->cs_brg_clk = PCLK_EX / 16;
 237
 238                 zc = zs_get_chan_addr(zs_unit, channel);
 239                 cs->cs_reg_csr  = &zc->zc_csr;
 240                 cs->cs_reg_data = &zc->zc_data;
 241
 242                 memcpy(cs->cs_creg, zs_init_reg, 16);
 243                 memcpy(cs->cs_preg, zs_init_reg, 16);
 244
 245                 /* XXX: Get these from the EEPROM instead? */
 246                 /* XXX: See the mvme167 code.  Better. */
 247                 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
 248                         cs->cs_defspeed = zs_get_speed(cs);
 249                 else
 250                         cs->cs_defspeed = zs_defspeed;
 251                 cs->cs_defcflag = zs_def_cflag;
 252
 253                 /* Make these correspond to cs_defcflag (-crtscts) */
 254                 cs->cs_rr0_dcd = ZSRR0_DCD;
 255                 cs->cs_rr0_cts = 0;
 256                 cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
 257                 cs->cs_wr5_rts = 0;
 258
 259                 /*
 260                  * Clear the master interrupt enable.
 261                  * The INTENA is common to both channels,
 262                  * so just do it on the A channel.
 263                  */
 264                 if (channel == 0) {
 265                         zs_write_reg(cs, 9, 0);
 266                 }
 267
 268                 /*
 269                  * Look for a child driver for this channel.
 270                  * The child attach will setup the hardware.
 271                  */
 272                 if (!config_found(self, (void *)&zsc_args, zs_print)) {
 273                         /* No sub-driver.  Just reset it. */
 274                         uint8_t reset = (channel == 0) ?
 275                             ZSWR9_A_RESET : ZSWR9_B_RESET;
 276                         s = splhigh();
 277                         zs_write_reg(cs, 9, reset);
 278                         splx(s);
 279                 }
 280         }
 281
 282         /*
 283          * Now safe to install interrupt handlers.  Note the arguments
 284          * to the interrupt handlers aren't used.  Note, we only do this
 285          * once since both SCCs interrupt at the same level and vector.
 286          */
 287         if (!didintr) {
 288                 didintr = 1;
 289
 290                 zsc->zsc_si = softint_establish(SOFTINT_SERIAL, zssoft, zsc);
 291                 hb_intr_establish(intlevel, INTST1_SCC, IPL_SERIAL,
 292                     zshard_hb, NULL);
 293         }
 294         /* XXX; evcnt_attach() ? */
 295
 296         /*
 297          * Set the master interrupt enable and interrupt vector.
 298          * (common to both channels, do it on A)
 299          */
 300         cs = zsc->zsc_cs[0];
 301         s = splhigh();
 302         /* interrupt vector */
 303         zs_write_reg(cs, 2, zs_init_reg[2]);
 304         /* master interrupt control (enable) */
 305         zs_write_reg(cs, 9, zs_init_reg[9]);
 306         splx(s);
 307 }
 308
 309 static int
 310 zshard_hb(void *arg)
 311 {
 312         int rv;
 313
 314         (void) *(volatile u_char *)SCCVECT;
 315         rv = zshard(arg);
 316
 317         /* XXX news3400 sometimes losts zs interrupt */
 318         if (rv)
 319                 zshard(arg);
 320
 321         return rv;
 322 }
 323
 324 /*
 325  * Polled input char.
 326  */
 327 int
 328 zs_getc(void *arg)
 329 {
 330         volatile struct zschan *zc = arg;
 331         int s, c, rr0;
 332
 333         s = splhigh();
 334         /* Wait for a character to arrive. */
 335         do {
 336                 rr0 = zc->zc_csr;
 337                 ZS_DELAY();
 338         } while ((rr0 & ZSRR0_RX_READY) == 0);
 339
 340         c = zc->zc_data;
 341         ZS_DELAY();
 342         splx(s);
 343
 344         /*
 345          * This is used by the kd driver to read scan codes,
 346          * so don't translate '\r' ==> '\n' here...
 347          */
 348         return c;
 349 }
 350
 351 /*
 352  * Polled output char.
 353  */
 354 void
 355 zs_putc(void *arg, int c)
 356 {
 357         volatile struct zschan *zc = arg;
 358         int s, rr0;
 359
 360         s = splhigh();
 361         /* Wait for transmitter to become ready. */
 362         do {
 363                 rr0 = zc->zc_csr;
 364                 ZS_DELAY();
 365         } while ((rr0 & ZSRR0_TX_READY) == 0);
 366
 367         zc->zc_data = c;
 368         ZS_DELAY();
 369         splx(s);
 370 }
 371
 372 /*****************************************************************/
 373
 374 static void zscnprobe(struct consdev *);
 375 static void zscninit(struct consdev *);
 376 static int  zscngetc(dev_t);
 377 static void zscnputc(dev_t, int);
 378
 379 struct consdev consdev_zs = {
 380         zscnprobe,
 381         zscninit,
 382         zscngetc,
 383         zscnputc,
 384         nullcnpollc,
 385         NULL,
 386         NULL,
 387         NULL,
 388         NODEV,
 389         CN_DEAD
 390 };
 391
 392 static void
 393 zscnprobe(struct consdev *cn)
 394 {
 395 }
 396
 397 static void
 398 zscninit(struct consdev *cn)
 399 {
 400         extern const struct cdevsw zstty_cdevsw;
 401
 402         cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
 403         cn->cn_pri = CN_REMOTE;
 404         zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
 405 }
 406
 407 static int
 408 zscngetc(dev_t dev)
 409 {
 410
 411         return zs_getc((void *)SCCPORT0A);
 412 }
 413
 414 static void
 415 zscnputc(dev_t dev, int c)
 416 {
 417
 418         zs_putc((void *)SCCPORT0A, c);
 419 }