1 /* $NetBSD: pcib.c,v 1.4 2008/04/04 16:04:19 matt Exp $ */
4 * Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.4 2008/04/04 16:04:19 matt Exp $");
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
40 #include <machine/bus.h>
42 #include <dev/isa/isavar.h>
44 #include <dev/pci/pcivar.h>
45 #include <dev/pci/pcireg.h>
47 #include <dev/pci/pcidevs.h>
52 int pcibmatch(device_t
, cfdata_t
, void *);
53 void pcibattach(device_t
, device_t
, void *);
57 struct powerpc_isa_chipset
*sc_chipset
;
60 extern struct powerpc_isa_chipset genppc_ict
;
61 extern struct genppc_pci_chipset
*genppc_pct
;
63 CFATTACH_DECL_NEW(pcib
, sizeof(struct pcib_softc
),
64 pcibmatch
, pcibattach
, NULL
, NULL
);
66 void pcib_callback(device_t
);
69 pcibmatch(device_t parent
, cfdata_t cf
, void *aux
)
71 struct pci_attach_args
*pa
= aux
;
74 * Match PCI-ISA bridge.
76 if (PCI_CLASS(pa
->pa_class
) == PCI_CLASS_BRIDGE
&&
77 PCI_SUBCLASS(pa
->pa_class
) == PCI_SUBCLASS_BRIDGE_ISA
) {
84 switch (PCI_VENDOR(pa
->pa_id
)) {
85 case PCI_VENDOR_INTEL
:
86 switch (PCI_PRODUCT(pa
->pa_id
)) {
87 case PCI_PRODUCT_INTEL_SIO
:
89 * The Intel SIO identifies itself as a
90 * miscellaneous prehistoric.
101 pcibattach(device_t parent
, device_t self
, void *aux
)
103 struct pci_attach_args
*pa
= aux
;
104 struct pcib_softc
*sc
= device_private(self
);
115 * Just print out a description and defer configuration
116 * until all PCI devices have been attached.
118 pci_devinfo(pa
->pa_id
, pa
->pa_class
, 0, devinfo
, sizeof(devinfo
));
119 aprint_normal(": %s (rev. 0x%02x)\n", devinfo
,
120 PCI_REVISION(pa
->pa_class
));
122 v
= pci_conf_read(pa
->pa_pc
, pa
->pa_tag
, 0x40);
123 if ((v
& 0x20) == 0) {
124 aprint_verbose("%s: PIRQ[0-3] not used\n", self
->dv_xname
);
126 v
= pci_conf_read(pa
->pa_pc
, pa
->pa_tag
, 0x60);
127 if ((v
& 0x80808080) == 0x80808080) {
128 aprint_verbose("%s: PIRQ[0-3] disabled\n",
132 aprint_verbose("%s:", device_xname(self
));
133 for (i
= 0; i
< 4; i
++, v
>>= 8) {
134 if ((v
& 0x80) == 0 && (v
& 0x0f) != 0) {
135 aprint_verbose(" PIRQ[%d]=%d", i
,
137 lvlmask
|= (1 << (v
& 0x0f));
140 aprint_verbose("\n");
145 * If we have an 83C553F-G sitting on a RAVEN host bridge,
146 * then we need to rewire some interrupts.
147 * The IDE Interrupt Routing Control Register lives at 0x43,
148 * and defaults to 0xEF, which means the primary controller
149 * interrupts on ivr-14, and the secondary on ivr-15. We
150 * reset it to 0xEE to fire them both at ivr-14.
151 * We have to rewrite the interrupt map, because the bridge map told
152 * us that the interrupt is MPIC 0, which is the bridge intr for
154 * Additionally, sometimes the PCI Interrupt Routing Control Register
155 * is improperly initialized, causing all sorts of wierd interrupt
156 * issues on the machine. The manual says it should default to
157 * 0000h (index 45-44h) however it would appear that PPCBUG is
158 * setting it up differently. Reset it to 0000h.
161 if (PCI_VENDOR(pa
->pa_id
) == PCI_VENDOR_SYMPHONY
&&
162 PCI_PRODUCT(pa
->pa_id
) == PCI_PRODUCT_SYMPHONY_83C553
) {
163 v
= pci_conf_read(pa
->pa_pc
, pa
->pa_tag
, 0x44) & 0xffff0000;
164 pci_conf_write(pa
->pa_pc
, pa
->pa_tag
, 0x44, v
);
168 rav
= prop_dictionary_get(device_properties(parent
),
171 if (rav
!= NULL
&& prop_bool_true(rav
) &&
172 PCI_VENDOR(pa
->pa_id
) == PCI_VENDOR_SYMPHONY
&&
173 PCI_PRODUCT(pa
->pa_id
) == PCI_PRODUCT_SYMPHONY_83C553
) {
175 prop_dictionary_t dict
, devsub
;
176 prop_number_t pinsub
;
177 struct genppc_pci_chipset_businfo
*pbi
;
179 v
= pci_conf_read(pa
->pa_pc
, pa
->pa_tag
, 0x40) & 0x00ffffff;
181 pci_conf_write(pa
->pa_pc
, pa
->pa_tag
, 0x40, v
);
183 pbi
= SIMPLEQ_FIRST(&genppc_pct
->pc_pbi
);
184 dict
= prop_dictionary_get(pbi
->pbi_properties
,
186 devsub
= prop_dictionary_get(dict
, "devfunc-11");
187 pinsub
= prop_number_create_integer(14);
188 prop_dictionary_set(devsub
, "pin-A", pinsub
);
189 prop_object_release(pinsub
);
190 aprint_verbose_dev(self
, "setting pciide irq to 14\n");
191 /* irq 14 is level */
196 config_defer(self
, pcib_callback
);
200 pcib_callback(device_t self
)
202 struct pcib_softc
*sc
= device_private(self
);
204 struct isabus_attach_args iba
;
207 * Attach the ISA bus behind this bridge.
209 memset(&iba
, 0, sizeof(iba
));
210 sc
->sc_chipset
= &genppc_ict
;
211 iba
.iba_ic
= sc
->sc_chipset
;
212 iba
.iba_iot
= &genppc_isa_io_space_tag
;
213 iba
.iba_memt
= &genppc_isa_mem_space_tag
;
215 iba
.iba_dmat
= &isa_bus_dma_tag
;
217 config_found_ia(sc
->sc_dev
, "isabus", &iba
, isabusprint
);