1 /* $NetBSD: pic_openpic.c,v 1.4 2008/01/17 23:43:00 garbled Exp $ */
4 * Copyright (c) 2007 Michael Lorenz
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: pic_openpic.c,v 1.4 2008/01/17 23:43:00 garbled Exp $");
32 #include <sys/param.h>
33 #include <sys/malloc.h>
34 #include <sys/kernel.h>
36 #include <uvm/uvm_extern.h>
38 #include <machine/pio.h>
39 #include <powerpc/openpic.h>
41 #include <arch/powerpc/pic/picvar.h>
43 #include "opt_interrupt.h"
45 static void opic_enable_irq(struct pic_ops
*, int, int);
46 static void opic_disable_irq(struct pic_ops
*, int);
47 static void opic_establish_irq(struct pic_ops
*, int, int, int);
50 setup_openpic(void *addr
, int passthrough
)
52 struct openpic_ops
*opicops
;
57 openpic_base
= (void *)addr
;
58 opicops
= malloc(sizeof(struct openpic_ops
), M_DEVBUF
, M_NOWAIT
);
59 KASSERT(opicops
!= NULL
);
62 x
= openpic_read(OPENPIC_FEATURE
);
63 if (((x
& 0x07ff0000) >> 16) == 0)
64 panic("setup_openpic() called on distributed openpic");
66 aprint_normal("OpenPIC Version 1.%d: "
67 "Supports %d CPUs and %d interrupt sources.\n",
68 x
& 0xff, ((x
& 0x1f00) >> 8) + 1, ((x
& 0x07ff0000) >> 16) + 1);
70 pic
->pic_numintrs
= ((x
& 0x07ff0000) >> 16) + 1;
71 pic
->pic_cookie
= addr
;
72 pic
->pic_enable_irq
= opic_enable_irq
;
73 pic
->pic_reenable_irq
= opic_enable_irq
;
74 pic
->pic_disable_irq
= opic_disable_irq
;
75 pic
->pic_get_irq
= opic_get_irq
;
76 pic
->pic_ack_irq
= opic_ack_irq
;
77 pic
->pic_establish_irq
= opic_establish_irq
;
78 pic
->pic_finish_setup
= opic_finish_setup
;
80 opicops
->nrofisus
= 0; /* internal only */
81 opicops
->flags
= 0; /* no flags (yet) */
82 opicops
->irq_per
= NULL
; /* internal ISU only */
83 strcpy(pic
->pic_name
, "openpic");
87 * the following sequence should make the same effects as openpic
88 * controller reset by writing a one at the self-clearing
89 * OPENPIC_CONFIG_RESET bit. Please check the document of your
90 * OpenPIC compliant interrupt controller and see whether #else
91 * portion can work as described.
94 openpic_set_priority(0, 15);
96 for (irq
= 0; irq
< pic
->pic_numintrs
; irq
++) {
97 /* make sure to keep disabled */
98 openpic_write(OPENPIC_SRC_VECTOR(irq
), OPENPIC_IMASK
);
99 /* send all interrupts to CPU 0 */
100 openpic_write(OPENPIC_IDEST(irq
), 1 << 0);
103 x
= openpic_read(OPENPIC_CONFIG
);
105 x
&= ~OPENPIC_CONFIG_8259_PASSTHRU_DISABLE
;
107 x
|= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE
;
108 openpic_write(OPENPIC_CONFIG
, x
);
110 openpic_write(OPENPIC_SPURIOUS_VECTOR
, 0xff);
112 openpic_set_priority(0, 0);
114 /* clear all pending interrunts */
115 for (irq
= 0; irq
< pic
->pic_numintrs
; irq
++) {
121 openpic_write(OPENPIC_CONFIG
, OPENPIC_CONFIG_RESET
);
123 x
= openpic_read(OPENPIC_CONFIG
);
124 } while (x
& OPENPIC_CONFIG_RESET
); /* S1C bit */
126 x
&= ~OPENPIC_CONFIG_8259_PASSTHRU_DISABLE
;
128 x
|= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE
;
129 openpic_write(OPENPIC_CONFIG
, x
);
130 openpic_set_priority(0, 0);
134 printf("timebase freq=%d\n", openpic_read(0x10f0));
140 opic_establish_irq(struct pic_ops
*pic
, int irq
, int type
, int pri
)
142 int realpri
= max(1, min(15, pri
));
148 OPENPIC_POLARITY_POSITIVE
: OPENPIC_POLARITY_NEGATIVE
;
149 x
|= (type
== IST_EDGE
) ? OPENPIC_SENSE_EDGE
: OPENPIC_SENSE_LEVEL
;
150 x
|= realpri
<< OPENPIC_PRIORITY_SHIFT
;
151 openpic_write(OPENPIC_SRC_VECTOR(irq
), x
);
153 aprint_debug("%s: setting IRQ %d to priority %d\n", __func__
, irq
,
158 opic_enable_irq(struct pic_ops
*pic
, int irq
, int type
)
162 x
= openpic_read(OPENPIC_SRC_VECTOR(irq
));
164 openpic_write(OPENPIC_SRC_VECTOR(irq
), x
);
168 opic_disable_irq(struct pic_ops
*pic
, int irq
)
172 x
= openpic_read(OPENPIC_SRC_VECTOR(irq
));
174 openpic_write(OPENPIC_SRC_VECTOR(irq
), x
);