1 /* $NetBSD: pci_machdep.c,v 1.31.4.4 2007/05/10 15:46:08 garbled Exp $ */
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 * Machine-specific functions for PCI autoconfiguration.
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.31.4.4 2007/05/10 15:46:08 garbled Exp $");
44 #include <sys/types.h>
45 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/errno.h>
49 #include <sys/extent.h>
50 #include <sys/device.h>
51 #include <sys/malloc.h>
53 #include <uvm/uvm_extern.h>
55 #define _POWERPC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57 #include <machine/intr.h>
58 #include <machine/platform.h>
59 #include <machine/pnp.h>
61 #include <dev/isa/isavar.h>
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/pcidevs.h>
66 #include <dev/pci/pciconf.h>
68 /* 0 == direct 1 == indirect */
69 int prep_pci_config_mode
= 1;
70 extern struct genppc_pci_chipset
*genppc_pct
;
71 extern u_int32_t prep_pci_baseaddr
;
72 extern u_int32_t prep_pci_basedata
;
75 prep_pci_get_chipset_tag_indirect(pci_chipset_tag_t pc
)
78 pc
->pc_conf_v
= (void *)pc
;
80 pc
->pc_attach_hook
= genppc_pci_indirect_attach_hook
;
81 pc
->pc_bus_maxdevs
= prep_pci_bus_maxdevs
;
82 pc
->pc_make_tag
= genppc_pci_indirect_make_tag
;
83 pc
->pc_conf_read
= genppc_pci_indirect_conf_read
;
84 pc
->pc_conf_write
= genppc_pci_indirect_conf_write
;
86 pc
->pc_intr_v
= (void *)pc
;
88 pc
->pc_intr_map
= prep_pci_intr_map
;
89 pc
->pc_intr_string
= genppc_pci_intr_string
;
90 pc
->pc_intr_evcnt
= genppc_pci_intr_evcnt
;
91 pc
->pc_intr_establish
= genppc_pci_intr_establish
;
92 pc
->pc_intr_disestablish
= genppc_pci_intr_disestablish
;
94 pc
->pc_conf_interrupt
= genppc_pci_conf_interrupt
;
95 pc
->pc_decompose_tag
= genppc_pci_indirect_decompose_tag
;
96 pc
->pc_conf_hook
= prep_pci_conf_hook
;
98 pc
->pc_addr
= mapiodev(prep_pci_baseaddr
, 4);
99 pc
->pc_data
= mapiodev(prep_pci_basedata
, 4);
107 prep_pci_get_chipset_tag(pci_chipset_tag_t pc
)
111 i
= pci_chipset_tag_type();
113 if (i
== PCIBridgeIndirect
|| i
== PCIBridgeRS6K
) {
114 prep_pci_config_mode
= 1;
115 prep_pci_get_chipset_tag_indirect(pc
);
116 } else if (i
== PCIBridgeDirect
) {
117 prep_pci_get_chipset_tag_direct(pc
);
118 prep_pci_config_mode
= 0;
120 panic("Unknown PCI chipset tag configuration method");
124 prep_pci_bus_maxdevs(pci_chipset_tag_t pc
, int busno
)
126 struct genppc_pci_chipset_businfo
*pbi
;
127 prop_object_t busmax
;
129 pbi
= SIMPLEQ_FIRST(&genppc_pct
->pc_pbi
);
131 pbi
= SIMPLEQ_NEXT(pbi
, next
);
135 busmax
= prop_dictionary_get(pbi
->pbi_properties
,
136 "prep-pcibus-maxdevices");
140 return prop_number_integer_value(busmax
);
146 prep_pci_intr_map(struct pci_attach_args
*pa
, pci_intr_handle_t
*ihp
)
148 struct genppc_pci_chipset_businfo
*pbi
;
149 prop_dictionary_t dict
, devsub
;
150 prop_object_t pinsub
;
152 int busno
, bus
, pin
, line
, swiz
, dev
, origdev
, i
;
155 pin
= pa
->pa_intrpin
;
156 line
= pa
->pa_intrline
;
157 bus
= busno
= pa
->pa_bus
;
158 swiz
= pa
->pa_intrswiz
;
159 origdev
= dev
= pa
->pa_device
;
162 pbi
= SIMPLEQ_FIRST(&genppc_pct
->pc_pbi
);
164 pbi
= SIMPLEQ_NEXT(pbi
, next
);
165 KASSERT(pbi
!= NULL
);
167 dict
= prop_dictionary_get(pbi
->pbi_properties
, "prep-pci-intrmap");
170 i
= prop_dictionary_count(dict
);
172 if (dict
== NULL
|| i
== 0) {
173 /* We have a non-PReP bus. now it gets hard */
174 pbus
= prop_dictionary_get(pbi
->pbi_properties
,
175 "prep-pcibus-parent");
178 busno
= prop_number_integer_value(pbus
);
179 pbus
= prop_dictionary_get(pbi
->pbi_properties
,
180 "prep-pcibus-rawdevnum");
181 dev
= prop_number_integer_value(pbus
);
183 /* now that we know the parent bus, we need to find it's pbi */
184 pbi
= SIMPLEQ_FIRST(&genppc_pct
->pc_pbi
);
186 pbi
= SIMPLEQ_NEXT(pbi
, next
);
187 KASSERT(pbi
!= NULL
);
189 /* swizzle the pin */
190 pin
= ((pin
+ origdev
- 1) & 3) + 1;
192 /* now we have the pbi, ask for dict again */
193 dict
= prop_dictionary_get(pbi
->pbi_properties
,
203 aprint_error("pci_intr_map: bad interrupt pin %d\n", pin
);
207 sprintf(key
, "devfunc-%d", dev
);
208 devsub
= prop_dictionary_get(dict
, key
);
211 sprintf(key
, "pin-%c", 'A' + (pin
-1));
212 pinsub
= prop_dictionary_get(devsub
, key
);
215 line
= prop_number_integer_value(pinsub
);
218 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
219 * `unknown' or `no connection' on a PC. We assume that a device with
220 * `no connection' either doesn't have an interrupt (in which case the
221 * pin number should be 0, and would have been noticed above), or
222 * wasn't configured by the BIOS (in which case we punt, since there's
223 * no real way we can know how the interrupt lines are mapped in the
227 * Since IRQ 0 is only used by the clock, and we can't actually be sure
228 * that the BIOS did its job, we also recognize that as meaning that
229 * the BIOS has not configured the device.
231 if (line
== 0 || line
== 255) {
232 aprint_error("pci_intr_map: no mapping for pin %c\n",
236 if (line
>= ICU_LEN
) {
237 aprint_error("pci_intr_map: bad interrupt line %d\n",
241 if (line
== IRQ_SLAVE
) {
242 aprint_verbose("pci_intr_map: changed line 2 to line 9\n");
255 extern pcitag_t
prep_pci_direct_make_tag(void *, int, int, int);
256 extern pcitag_t
genppc_pci_indirect_make_tag(void *, int, int, int);
257 extern pcireg_t
prep_pci_direct_conf_read(void *, pcitag_t
, int);
258 extern pcireg_t
genppc_pci_indirect_conf_read(void *, pcitag_t
, int);
261 prep_pci_conf_hook(pci_chipset_tag_t pct
, int bus
, int dev
, int func
,
264 struct genppc_pci_chipset_businfo
*pbi
;
265 prop_number_t bmax
, pbus
;
270 * The P9100 board found in some IBM machines cannot be
273 if (PCI_VENDOR(id
) == PCI_VENDOR_WEITEK
&&
274 PCI_PRODUCT(id
) == PCI_PRODUCT_WEITEK_P9100
)
277 /* We have already mapped the MPIC2 if we have one, so leave it
279 if (PCI_VENDOR(id
) == PCI_VENDOR_IBM
&&
280 PCI_PRODUCT(id
) == PCI_PRODUCT_IBM_MPIC2
)
283 if (PCI_VENDOR(id
) == PCI_VENDOR_IBM
&&
284 PCI_PRODUCT(id
) == PCI_PRODUCT_IBM_MPIC
)
287 if (PCI_VENDOR(id
) == PCI_VENDOR_INTEL
&&
288 PCI_PRODUCT(id
) == PCI_PRODUCT_INTEL_PCEB
)
291 if (PCI_VENDOR(id
) == PCI_VENDOR_MOT
&&
292 PCI_PRODUCT(id
) == PCI_PRODUCT_MOT_RAVEN
)
293 return (PCI_CONF_ALL
& ~PCI_CONF_MAP_MEM
);
295 /* NOTE, all device specific stuff must be above this line */
296 /* don't do this on the primary host bridge */
297 if (bus
== 0 && dev
== 0 && func
== 0)
298 return PCI_CONF_DEFAULT
;
300 if (prep_pci_config_mode
) {
301 tag
= genppc_pci_indirect_make_tag(pct
, bus
, dev
, func
);
302 class = genppc_pci_indirect_conf_read(pct
, tag
,
305 tag
= prep_pci_direct_make_tag(pct
, bus
, dev
, func
);
306 class = prep_pci_direct_conf_read(pct
, tag
,
311 * PCI bridges have special needs. We need to discover where they
312 * came from, and wire them appropriately.
314 if (PCI_CLASS(class) == PCI_CLASS_BRIDGE
&&
315 PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_PCI
) {
316 pbi
= malloc(sizeof(struct genppc_pci_chipset_businfo
),
318 KASSERT(pbi
!= NULL
);
319 pbi
->pbi_properties
= prop_dictionary_create();
320 KASSERT(pbi
->pbi_properties
!= NULL
);
321 setup_pciintr_map(pbi
, bus
, dev
, func
);
323 /* record the parent bus, and the parent device number */
324 pbus
= prop_number_create_integer(bus
);
325 prop_dictionary_set(pbi
->pbi_properties
, "prep-pcibus-parent",
327 prop_object_release(pbus
);
328 pbus
= prop_number_create_integer(dev
);
329 prop_dictionary_set(pbi
->pbi_properties
,
330 "prep-pcibus-rawdevnum", pbus
);
331 prop_object_release(pbus
);
333 /* now look for bus quirks */
335 if (PCI_VENDOR(id
) == PCI_VENDOR_DEC
&&
336 PCI_PRODUCT(id
) == PCI_PRODUCT_DEC_21154
) {
337 bmax
= prop_number_create_integer(8);
338 KASSERT(bmax
!= NULL
);
339 prop_dictionary_set(pbi
->pbi_properties
,
340 "prep-pcibus-maxdevices", bmax
);
341 prop_object_release(bmax
);
344 SIMPLEQ_INSERT_TAIL(&genppc_pct
->pc_pbi
, pbi
, next
);
347 return (PCI_CONF_DEFAULT
);