sys/arch/prep/stand/boot/srt0.s

   1 /*      $NetBSD: srt0.s,v 1.1.30.3 2004/09/21 13:21:07 skrll Exp $      */
   2
   3 /*
   4  * Copyright (C) 1996-1999 Cort Dougan (cort@fsmlasb.com).
   5  * Copyright (C) 1996-1999 Gary Thomas (gdt@osf.org).
   6  * Copyright (C) 1996-1999 Paul Mackeras (paulus@linuxcare.com).
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed by TooLs GmbH.
  20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  21  *    derived from this software without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 #define MSR_IP          (1<<6)
  36
  37 #define HID0_DCI        (1<<10)
  38 #define HID0_ICFI       (1<<11)
  39 #define HID0_DCE        (1<<14)
  40 #define HID0_ICE        (1<<15)
  41
  42         .text
  43
  44         .globl  _start
  45 _start:
  46         bl      start
  47 start:
  48         mr      11,3            /* Save pointer to residual/board data */
  49         li      3,MSR_IP        /* Establish default MSR value */
  50         mtmsr   3
  51         isync
  52
  53         mflr    7
  54         bl      flush_icache
  55         mfspr   3,1008
  56         lis     4,~(HID0_ICE|HID0_DCE)@h
  57         ori     4,4,~(HID0_ICE|HID0_DCE)@l
  58         andc    3,3,4
  59         mtspr   1008,3
  60         mtlr    7
  61
  62 /*
  63  * check if we need to relocate ourselves to the link addr or were we
  64  * loaded there to begin with -- Cort
  65  */
  66         lis     4,_start@h
  67         ori     4,4,_start@l
  68         mflr    3
  69         subi    3,3,4           /* we get the nip, not the ip of the branch */
  70         mr      8,3
  71         cmpw    3,4
  72         bne     relocate
  73         b       start_ldr
  74
  75 /*
  76  * no matter where we're loaded, move ourselves to -Ttext address
  77  */
  78 relocate:
  79         lis     4,_start@h
  80         ori     4,4,_start@l
  81         lis     5,end@h
  82         ori     5,5,end@l
  83         addi    5,5,3           /* Round up - just in case */
  84         sub     5,5,4           /* Compute # longwords to move */
  85         srwi    5,5,2
  86         mtctr   5
  87         subi    3,3,4           /* Set up for loop */
  88         subi    4,4,4
  89 2:
  90         lwzu    5,4(3)
  91         stwu    5,4(4)
  92         bdnz    2b
  93         lis     3,start_ldr@h
  94         ori     3,3,start_ldr@l
  95         mtlr    3               /* Easiest way to do an absolute jump */
  96         blr
  97 start_ldr:
  98         mr      9,1             /* Save old stack pointer */
  99         lis     1,.stack@h
 100         ori     1,1,.stack@l
 101         addi    1,1,4096
 102         li      2,0x000F
 103         andc    1,1,2
 104         mr      3,11            /* arg1: residual/board data */
 105         mr      4,8             /* arg2: loadaddr */
 106         bl      boot
 107 hang:
 108         b       hang
 109
 110 /*
 111  * Execute
 112  * run(startsym, endsym, args, bootinfo, entry)
 113  */
 114         .globl  run
 115 run:
 116         mtctr   7                       /* Entry point */
 117         bctr
 118
 119 /*
 120  * Flush instruction cache
 121  */
 122         .globl flush_icache
 123 flush_icache:
 124         mflr    5
 125         bl      flush_dcache
 126         mfspr   4,1008
 127         li      4,0
 128         ori     4,4,HID0_ICE|HID0_ICFI
 129         or      3,3,4
 130         mtspr   1008,3
 131         andc    3,3,4
 132         ori     3,3,HID0_ICE
 133         mtspr   1008,3
 134         mtlr    5
 135         blr
 136
 137 /*
 138  * Flush data cache
 139  */
 140         .globl flush_dcache
 141 flush_dcache:
 142         lis     3,0x1000@h
 143         ori     3,3,0x1000@l
 144         li      4,1024
 145         mtctr   4
 146 1:
 147         lwz     4,0(3)
 148         addi    3,3,32
 149         bdnz    1b
 150         blr
 151
 152 /*
 153  * local stack
 154  */
 155         .comm   .stack,8192,4