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[netbsd-mini2440.git] / sys / arch / sparc / fpu / fpu_compare.c
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1 /* $NetBSD: fpu_compare.c,v 1.3.22.3 2004/09/21 13:22:14 skrll Exp $ */
3 /*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
7 * This software was developed by the Computer Systems Engineering group
8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
9 * contributed to Berkeley.
11 * All advertising materials mentioning features or use of this software
12 * must display the following acknowledgement:
13 * This product includes software developed by the University of
14 * California, Lawrence Berkeley Laboratory.
16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
40 * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93
44 * CMP and CMPE instructions.
46 * These rely on the fact that our internal wide format is achieved by
47 * adding zero bits to the end of narrower mantissas.
50 #include <sys/cdefs.h>
51 __KERNEL_RCSID(0, "$NetBSD: fpu_compare.c,v 1.3.22.3 2004/09/21 13:22:14 skrll Exp $");
53 #include <sys/types.h>
55 #include <machine/reg.h>
57 #include <sparc/fpu/fpu_arith.h>
58 #include <sparc/fpu/fpu_emu.h>
61 * Perform a compare instruction (with or without unordered exception).
62 * This updates the fcc field in the fsr.
64 * If either operand is NaN, the result is unordered. For cmpe, this
65 * causes an NV exception. Everything else is ordered:
66 * |Inf| > |numbers| > |0|.
67 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0),
68 * so we get this directly. Note, however, that two zeros compare equal
69 * regardless of sign, while everything else depends on sign.
71 * Incidentally, two Infs of the same sign compare equal (per the 80387
72 * manual---it would be nice if the SPARC documentation were more
73 * complete).
75 void
76 fpu_compare(struct fpemu *fe, int cmpe)
78 register struct fpn *a, *b;
79 register int cc;
80 FPU_DECL_CARRY
82 a = &fe->fe_f1;
83 b = &fe->fe_f2;
85 if (ISNAN(a) || ISNAN(b)) {
87 * In any case, we already got an exception for signalling
88 * NaNs; here we may replace that one with an identical
89 * exception, but so what?.
91 if (cmpe)
92 fe->fe_cx = FSR_NV;
93 cc = FSR_CC_UO;
94 goto done;
98 * Must handle both-zero early to avoid sign goofs. Otherwise,
99 * at most one is 0, and if the signs differ we are done.
101 if (ISZERO(a) && ISZERO(b)) {
102 cc = FSR_CC_EQ;
103 goto done;
105 if (a->fp_sign) { /* a < 0 (or -0) */
106 if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */
107 cc = FSR_CC_LT;
108 goto done;
110 } else { /* a > 0 (or +0) */
111 if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */
112 cc = FSR_CC_GT;
113 goto done;
118 * Now the signs are the same (but may both be negative). All
119 * we have left are these cases:
121 * |a| < |b| [classes or values differ]
122 * |a| > |b| [classes or values differ]
123 * |a| == |b| [classes and values identical]
125 * We define `diff' here to expand these as:
127 * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT
128 * |a| < |b|, a,b < 0: a > b => FSR_CC_GT
129 * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT
130 * |a| > |b|, a,b < 0: a < b => FSR_CC_LT
132 #define opposite_cc(cc) ((cc) == FSR_CC_LT ? FSR_CC_GT : FSR_CC_LT)
133 #define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude))
134 if (a->fp_class < b->fp_class) { /* |a| < |b| */
135 cc = diff(FSR_CC_LT);
136 goto done;
138 if (a->fp_class > b->fp_class) { /* |a| > |b| */
139 cc = diff(FSR_CC_GT);
140 goto done;
142 /* now none can be 0: only Inf and numbers remain */
143 if (ISINF(a)) { /* |Inf| = |Inf| */
144 cc = FSR_CC_EQ;
145 goto done;
148 * Only numbers remain. To compare two numbers in magnitude, we
149 * simply subtract them.
151 a = fpu_sub(fe);
152 if (a->fp_class == FPC_ZERO)
153 cc = FSR_CC_EQ;
154 else
155 cc = diff(FSR_CC_GT);
157 done:
158 fe->fe_fsr = (fe->fe_fsr & ~FSR_FCC) | (cc << FSR_FCC_SHIFT);