sys/arch/sparc/fpu/fpu_div.c

   1 /*      $NetBSD: fpu_div.c,v 1.4 2003/08/07 16:29:37 agc Exp $ */
   2
   3 /*
   4  * Copyright (c) 1992, 1993
   5  *      The Regents of the University of California.  All rights reserved.
   6  *
   7  * This software was developed by the Computer Systems Engineering group
   8  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
   9  * contributed to Berkeley.
  10  *
  11  * All advertising materials mentioning features or use of this software
  12  * must display the following acknowledgement:
  13  *      This product includes software developed by the University of
  14  *      California, Lawrence Berkeley Laboratory.
  15  *
  16  * Redistribution and use in source and binary forms, with or without
  17  * modification, are permitted provided that the following conditions
  18  * are met:
  19  * 1. Redistributions of source code must retain the above copyright
  20  *    notice, this list of conditions and the following disclaimer.
  21  * 2. Redistributions in binary form must reproduce the above copyright
  22  *    notice, this list of conditions and the following disclaimer in the
  23  *    documentation and/or other materials provided with the distribution.
  24  * 3. Neither the name of the University nor the names of its contributors
  25  *    may be used to endorse or promote products derived from this software
  26  *    without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  29  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  30  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  31  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  32  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  37  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  38  * SUCH DAMAGE.
  39  *
  40  *      @(#)fpu_div.c   8.1 (Berkeley) 6/11/93
  41  */
  42
  43 /*
  44  * Perform an FPU divide (return x / y).
  45  */
  46
  47 #include <sys/cdefs.h>
  48 __KERNEL_RCSID(0, "$NetBSD: fpu_div.c,v 1.4 2003/08/07 16:29:37 agc Exp $");
  49
  50 #include <sys/types.h>
  51
  52 #include <machine/reg.h>
  53
  54 #include <sparc/fpu/fpu_arith.h>
  55 #include <sparc/fpu/fpu_emu.h>
  56
  57 /*
  58  * Division of normal numbers is done as follows:
  59  *
  60  * x and y are floating point numbers, i.e., in the form 1.bbbb * 2^e.
  61  * If X and Y are the mantissas (1.bbbb's), the quotient is then:
  62  *
  63  *      q = (X / Y) * 2^((x exponent) - (y exponent))
  64  *
  65  * Since X and Y are both in [1.0,2.0), the quotient's mantissa (X / Y)
  66  * will be in [0.5,2.0).  Moreover, it will be less than 1.0 if and only
  67  * if X < Y.  In that case, it will have to be shifted left one bit to
  68  * become a normal number, and the exponent decremented.  Thus, the
  69  * desired exponent is:
  70  *
  71  *      left_shift = x->fp_mant < y->fp_mant;
  72  *      result_exp = x->fp_exp - y->fp_exp - left_shift;
  73  *
  74  * The quotient mantissa X/Y can then be computed one bit at a time
  75  * using the following algorithm:
  76  *
  77  *      Q = 0;                  -- Initial quotient.
  78  *      R = X;                  -- Initial remainder,
  79  *      if (left_shift)         --   but fixed up in advance.
  80  *              R *= 2;
  81  *      for (bit = FP_NMANT; --bit >= 0; R *= 2) {
  82  *              if (R >= Y) {
  83  *                      Q |= 1 << bit;
  84  *                      R -= Y;
  85  *              }
  86  *      }
  87  *
  88  * The subtraction R -= Y always removes the uppermost bit from R (and
  89  * can sometimes remove additional lower-order 1 bits); this proof is
  90  * left to the reader.
  91  *
  92  * This loop correctly calculates the guard and round bits since they are
  93  * included in the expanded internal representation.  The sticky bit
  94  * is to be set if and only if any other bits beyond guard and round
  95  * would be set.  From the above it is obvious that this is true if and
  96  * only if the remainder R is nonzero when the loop terminates.
  97  *
  98  * Examining the loop above, we can see that the quotient Q is built
  99  * one bit at a time ``from the top down''.  This means that we can
 100  * dispense with the multi-word arithmetic and just build it one word
 101  * at a time, writing each result word when it is done.
 102  *
 103  * Furthermore, since X and Y are both in [1.0,2.0), we know that,
 104  * initially, R >= Y.  (Recall that, if X < Y, R is set to X * 2 and
 105  * is therefore at in [2.0,4.0).)  Thus Q is sure to have bit FP_NMANT-1
 106  * set, and R can be set initially to either X - Y (when X >= Y) or
 107  * 2X - Y (when X < Y).  In addition, comparing R and Y is difficult,
 108  * so we will simply calculate R - Y and see if that underflows.
 109  * This leads to the following revised version of the algorithm:
 110  *
 111  *      R = X;
 112  *      bit = FP_1;
 113  *      D = R - Y;
 114  *      if (D >= 0) {
 115  *              result_exp = x->fp_exp - y->fp_exp;
 116  *              R = D;
 117  *              q = bit;
 118  *              bit >>= 1;
 119  *      } else {
 120  *              result_exp = x->fp_exp - y->fp_exp - 1;
 121  *              q = 0;
 122  *      }
 123  *      R <<= 1;
 124  *      do  {
 125  *              D = R - Y;
 126  *              if (D >= 0) {
 127  *                      q |= bit;
 128  *                      R = D;
 129  *              }
 130  *              R <<= 1;
 131  *      } while ((bit >>= 1) != 0);
 132  *      Q[0] = q;
 133  *      for (i = 1; i < 4; i++) {
 134  *              q = 0, bit = 1 << 31;
 135  *              do {
 136  *                      D = R - Y;
 137  *                      if (D >= 0) {
 138  *                              q |= bit;
 139  *                              R = D;
 140  *                      }
 141  *                      R <<= 1;
 142  *              } while ((bit >>= 1) != 0);
 143  *              Q[i] = q;
 144  *      }
 145  *
 146  * This can be refined just a bit further by moving the `R <<= 1'
 147  * calculations to the front of the do-loops and eliding the first one.
 148  * The process can be terminated immediately whenever R becomes 0, but
 149  * this is relatively rare, and we do not bother.
 150  */
 151
 152 struct fpn *
 153 fpu_div(struct fpemu *fe)
 154 {
 155         register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2;
 156         register u_int q, bit;
 157         register u_int r0, r1, r2, r3, d0, d1, d2, d3, y0, y1, y2, y3;
 158         FPU_DECL_CARRY
 159
 160         /*
 161          * Since divide is not commutative, we cannot just use ORDER.
 162          * Check either operand for NaN first; if there is at least one,
 163          * order the signalling one (if only one) onto the right, then
 164          * return it.  Otherwise we have the following cases:
 165          *
 166          *      Inf / Inf = NaN, plus NV exception
 167          *      Inf / num = Inf [i.e., return x]
 168          *      Inf / 0   = Inf [i.e., return x]
 169          *      0 / Inf = 0 [i.e., return x]
 170          *      0 / num = 0 [i.e., return x]
 171          *      0 / 0   = NaN, plus NV exception
 172          *      num / Inf = 0
 173          *      num / num = num (do the divide)
 174          *      num / 0   = Inf, plus DZ exception
 175          */
 176         if (ISNAN(x) || ISNAN(y)) {
 177                 ORDER(x, y);
 178                 return (y);
 179         }
 180         if (ISINF(x) || ISZERO(x)) {
 181                 if (x->fp_class == y->fp_class)
 182                         return (fpu_newnan(fe));
 183                 return (x);
 184         }
 185
 186         /* all results at this point use XOR of operand signs */
 187         x->fp_sign ^= y->fp_sign;
 188         if (ISINF(y)) {
 189                 x->fp_class = FPC_ZERO;
 190                 return (x);
 191         }
 192         if (ISZERO(y)) {
 193                 fe->fe_cx = FSR_DZ;
 194                 x->fp_class = FPC_INF;
 195                 return (x);
 196         }
 197
 198         /*
 199          * Macros for the divide.  See comments at top for algorithm.
 200          * Note that we expand R, D, and Y here.
 201          */
 202
 203 #define SUBTRACT                /* D = R - Y */ \
 204         FPU_SUBS(d3, r3, y3); FPU_SUBCS(d2, r2, y2); \
 205         FPU_SUBCS(d1, r1, y1); FPU_SUBC(d0, r0, y0)
 206
 207 #define NONNEGATIVE             /* D >= 0 */ \
 208         ((int)d0 >= 0)
 209
 210 #ifdef FPU_SHL1_BY_ADD
 211 #define SHL1                    /* R <<= 1 */ \
 212         FPU_ADDS(r3, r3, r3); FPU_ADDCS(r2, r2, r2); \
 213         FPU_ADDCS(r1, r1, r1); FPU_ADDC(r0, r0, r0)
 214 #else
 215 #define SHL1 \
 216         r0 = (r0 << 1) | (r1 >> 31), r1 = (r1 << 1) | (r2 >> 31), \
 217         r2 = (r2 << 1) | (r3 >> 31), r3 <<= 1
 218 #endif
 219
 220 #define LOOP                    /* do ... while (bit >>= 1) */ \
 221         do { \
 222                 SHL1; \
 223                 SUBTRACT; \
 224                 if (NONNEGATIVE) { \
 225                         q |= bit; \
 226                         r0 = d0, r1 = d1, r2 = d2, r3 = d3; \
 227                 } \
 228         } while ((bit >>= 1) != 0)
 229
 230 #define WORD(r, i)                      /* calculate r->fp_mant[i] */ \
 231         q = 0; \
 232         bit = 1 << 31; \
 233         LOOP; \
 234         (x)->fp_mant[i] = q
 235
 236         /* Setup.  Note that we put our result in x. */
 237         r0 = x->fp_mant[0];
 238         r1 = x->fp_mant[1];
 239         r2 = x->fp_mant[2];
 240         r3 = x->fp_mant[3];
 241         y0 = y->fp_mant[0];
 242         y1 = y->fp_mant[1];
 243         y2 = y->fp_mant[2];
 244         y3 = y->fp_mant[3];
 245
 246         bit = FP_1;
 247         SUBTRACT;
 248         if (NONNEGATIVE) {
 249                 x->fp_exp -= y->fp_exp;
 250                 r0 = d0, r1 = d1, r2 = d2, r3 = d3;
 251                 q = bit;
 252                 bit >>= 1;
 253         } else {
 254                 x->fp_exp -= y->fp_exp + 1;
 255                 q = 0;
 256         }
 257         LOOP;
 258         x->fp_mant[0] = q;
 259         WORD(x, 1);
 260         WORD(x, 2);
 261         WORD(x, 3);
 262         x->fp_sticky = r0 | r1 | r2 | r3;
 263
 264         return (x);
 265 }