1 /* $NetBSD: zs.c,v 1.68 2009/05/22 03:51:30 mrg Exp $ */
4 * Copyright (c) 1996 The NetBSD Foundation, Inc.
7 * This code is derived from software contributed to The NetBSD Foundation
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
33 * Zilog Z8530 Dual UART driver (machine-dependent part)
35 * Runs two serial lines per chip using slave drivers.
36 * Plain tty/async lines use the zs_async slave.
37 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.68 2009/05/22 03:51:30 mrg Exp $");
46 #include <sys/param.h>
47 #include <sys/systm.h>
49 #include <sys/device.h>
51 #include <sys/ioctl.h>
52 #include <sys/kernel.h>
56 #include <sys/syslog.h>
59 #include <machine/autoconf.h>
60 #include <machine/openfirm.h>
61 #include <machine/cpu.h>
62 #include <machine/eeprom.h>
63 #include <machine/psl.h>
64 #include <machine/z8530var.h>
67 #include <dev/ic/z8530reg.h>
68 #include <dev/sun/kbd_ms_ttyvar.h>
69 #include <ddb/db_output.h>
71 #include <sparc64/dev/cons.h>
74 #include "kbd.h" /* NKBD */
75 #include "ms.h" /* NMS */
76 #include "zs.h" /* NZS */
78 /* Make life easier for the initialized arrays here. */
85 * Some warts needed by z8530tty.c -
86 * The default parity REALLY needs to be the same as the PROM uses,
87 * or you can not see messages done with printf during boot-up...
89 int zs_def_cflag
= (CREAD
| CS8
| HUPCL
);
92 * The Sun provides a 4.9152 MHz clock to the ZS chips.
94 #define PCLK (9600 * 512) /* PCLK pin input clock rate */
98 /* The layout of this is hardware-dependent (padding, order). */
100 volatile uint8_t zc_csr
; /* ctrl,status, and indirect access */
102 volatile uint8_t zc_data
; /* data */
106 /* Yes, they are backwards. */
107 struct zschan zs_chan_b
;
108 struct zschan zs_chan_a
;
111 /* ZS channel used as the console device (if any) */
112 void *zs_conschan_get
, *zs_conschan_put
;
114 /* Saved PROM mappings */
115 static struct zsdevice
*zsaddr
[NZS
];
117 static uint8_t zs_init_reg
[16] = {
118 0, /* 0: CMD (reset, etc.) */
119 0, /* 1: No interrupts yet. */
121 ZSWR3_RX_8
| ZSWR3_RX_ENABLE
,
122 ZSWR4_CLK_X16
| ZSWR4_ONESB
| ZSWR4_EVENP
,
123 ZSWR5_TX_8
| ZSWR5_TX_ENABLE
,
124 0, /* 6: TXSYNC/SYNCLO */
125 0, /* 7: RXSYNC/SYNCHI */
126 0, /* 8: alias for data port */
127 ZSWR9_MASTER_IE
| ZSWR9_NO_VECTOR
,
128 0, /*10: Misc. TX/RX control bits */
129 ZSWR11_TXCLK_BAUD
| ZSWR11_RXCLK_BAUD
,
130 ((PCLK
/32)/9600)-2, /*12: BAUDLO (default=9600) */
131 0, /*13: BAUDHI (default=9600) */
132 ZSWR14_BAUD_ENA
| ZSWR14_BAUD_FROM_PCLK
,
137 static int zscngetc(dev_t
);
138 static void zscnputc(dev_t
, int);
139 static void zscnpollc(dev_t
, int);
141 struct consdev zs_consdev
= {
144 .cn_pollc
= zscnpollc
,
148 /****************************************************************
150 ****************************************************************/
152 /* Definition of the driver for autoconfig. */
153 static int zs_match_sbus(device_t
, cfdata_t
, void *);
154 static void zs_attach_sbus(device_t
, device_t
, void *);
156 static void zs_attach(struct zsc_softc
*, struct zsdevice
*, int);
157 static int zs_print(void *, const char *);
159 CFATTACH_DECL_NEW(zs
, sizeof(struct zsc_softc
),
160 zs_match_sbus
, zs_attach_sbus
, NULL
, NULL
);
162 /* Interrupt handlers. */
163 int zscheckintr(void *);
164 static int zshard(void *);
165 static void zssoft(void *);
167 static int zs_get_speed(struct zs_chanstate
*);
169 /* Console device support */
170 static int zs_console_flags(int, int, int);
172 /* Power management hooks */
173 int zs_enable(struct zs_chanstate
*);
174 void zs_disable(struct zs_chanstate
*);
176 /* from dev/ic/z8530tty.c */
177 struct tty
*zstty_get_tty_from_dev(struct device
*);
180 * Is the zs chip present?
183 zs_match_sbus(device_t parent
, cfdata_t cf
, void *aux
)
185 struct sbus_attach_args
*sa
= aux
;
187 if (strcmp(cf
->cf_name
, sa
->sa_name
) != 0)
194 zs_attach_sbus(device_t parent
, device_t self
, void *aux
)
196 struct zsc_softc
*zsc
= device_private(self
);
197 struct sbus_attach_args
*sa
= aux
;
198 bus_space_handle_t bh
;
202 zs_unit
= device_unit(self
);
204 if (sa
->sa_nintr
== 0) {
205 aprint_error(": no interrupt lines\n");
209 /* Use the mapping setup by the Sun PROM if possible. */
210 if (zsaddr
[zs_unit
] == NULL
) {
211 /* Only map registers once. */
212 if (sa
->sa_npromvaddrs
) {
214 * We're converting from a 32-bit pointer to a 64-bit
215 * pointer. Since the 32-bit entity is negative, but
216 * the kernel is still mapped into the lower 4GB
217 * range, this needs to be zero-extended.
219 * XXXXX If we map the kernel and devices into the
220 * high 4GB range, this needs to be changed to
221 * sign-extend the address.
223 sparc_promaddr_to_handle(sa
->sa_bustag
,
224 sa
->sa_promvaddrs
[0], &bh
);
228 if (sbus_bus_map(sa
->sa_bustag
, sa
->sa_slot
,
231 BUS_SPACE_MAP_LINEAR
,
233 aprint_error(": cannot map registers\n");
237 zsaddr
[zs_unit
] = bus_space_vaddr(sa
->sa_bustag
, bh
);
239 zsc
->zsc_bustag
= sa
->sa_bustag
;
240 zsc
->zsc_dmatag
= sa
->sa_dmatag
;
241 zsc
->zsc_promunit
= prom_getpropint(sa
->sa_node
, "slave", -2);
242 zsc
->zsc_node
= sa
->sa_node
;
243 zs_attach(zsc
, zsaddr
[zs_unit
], sa
->sa_pri
);
249 * USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
250 * SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
253 zs_attach(struct zsc_softc
*zsc
, struct zsdevice
*zsd
, int pri
)
255 struct zsc_attach_args zsc_args
;
256 struct zs_chanstate
*cs
;
260 aprint_error(": configuration incomplete\n");
265 * Initialize software state for each channel.
267 for (channel
= 0; channel
< 2; channel
++) {
269 struct device
*child
;
271 zsc_args
.channel
= channel
;
272 cs
= &zsc
->zsc_cs_store
[channel
];
273 zsc
->zsc_cs
[channel
] = cs
;
276 cs
->cs_channel
= channel
;
277 cs
->cs_private
= NULL
;
278 cs
->cs_ops
= &zsops_null
;
279 cs
->cs_brg_clk
= PCLK
/ 16;
281 zc
= (channel
== 0) ? &zsd
->zs_chan_a
: &zsd
->zs_chan_b
;
283 zsc_args
.consdev
= NULL
;
284 zsc_args
.hwflags
= zs_console_flags(zsc
->zsc_promunit
,
288 if (zsc_args
.hwflags
& ZS_HWFLAG_CONSOLE
) {
289 zsc_args
.hwflags
|= ZS_HWFLAG_USE_CONSDEV
;
290 zsc_args
.consdev
= &zs_consdev
;
293 if ((zsc_args
.hwflags
& ZS_HWFLAG_CONSOLE_INPUT
) != 0) {
294 zs_conschan_get
= zc
;
296 if ((zsc_args
.hwflags
& ZS_HWFLAG_CONSOLE_OUTPUT
) != 0) {
297 zs_conschan_put
= zc
;
300 /* Children need to set cn_dev, etc */
301 cs
->cs_reg_csr
= &zc
->zc_csr
;
302 cs
->cs_reg_data
= &zc
->zc_data
;
304 memcpy(cs
->cs_creg
, zs_init_reg
, 16);
305 memcpy(cs
->cs_preg
, zs_init_reg
, 16);
307 /* XXX: Consult PROM properties for this?! */
308 cs
->cs_defspeed
= zs_get_speed(cs
);
309 cs
->cs_defcflag
= zs_def_cflag
;
311 /* Make these correspond to cs_defcflag (-crtscts) */
312 cs
->cs_rr0_dcd
= ZSRR0_DCD
;
314 cs
->cs_wr5_dtr
= ZSWR5_DTR
| ZSWR5_RTS
;
318 * Clear the master interrupt enable.
319 * The INTENA is common to both channels,
320 * so just do it on the A channel.
323 zs_write_reg(cs
, 9, 0);
327 * Look for a child driver for this channel.
328 * The child attach will setup the hardware.
330 child
= config_found(zsc
->zsc_dev
, (void *)&zsc_args
,
333 /* No sub-driver. Just reset it. */
334 uint8_t reset
= (channel
== 0) ?
335 ZSWR9_A_RESET
: ZSWR9_B_RESET
;
337 zs_write_reg(cs
, 9, reset
);
340 #if (NKBD > 0) || (NMS > 0)
342 * If this was a zstty it has a keyboard
343 * property on it we need to attach the
344 * sunkbd and sunms line disciplines.
347 && (device_is_a(child
, "zstty"))
348 && (prom_getproplen(zsc
->zsc_node
, "keyboard") == 0)) {
349 struct kbd_ms_tty_attach_args kma
;
352 kma
.kmta_tp
= tp
= zstty_get_tty_from_dev(child
);
353 kma
.kmta_dev
= tp
->t_dev
;
354 kma
.kmta_consdev
= zsc_args
.consdev
;
356 /* Attach 'em if we got 'em. */
359 kma
.kmta_name
= "keyboard";
360 config_found(child
, (void *)&kma
, NULL
);
365 kma
.kmta_name
= "mouse";
366 config_found(child
, (void *)&kma
, NULL
);
374 * Now safe to install interrupt handlers. Note the arguments
375 * to the interrupt handlers aren't used. Note, we only do this
376 * once since both SCCs interrupt at the same level and vector.
378 bus_intr_establish(zsc
->zsc_bustag
, pri
, IPL_SERIAL
, zshard
, zsc
);
379 if (!(zsc
->zsc_softintr
= softint_establish(SOFTINT_SERIAL
, zssoft
, zsc
)))
380 panic("zsattach: could not establish soft interrupt");
382 evcnt_attach_dynamic(&zsc
->zsc_intrcnt
, EVCNT_TYPE_INTR
, NULL
,
383 device_xname(zsc
->zsc_dev
), "intr");
387 * Set the master interrupt enable and interrupt vector.
388 * (common to both channels, do it on A)
392 /* interrupt vector */
393 zs_write_reg(cs
, 2, zs_init_reg
[2]);
394 /* master interrupt control (enable) */
395 zs_write_reg(cs
, 9, zs_init_reg
[9]);
400 zs_print(void *aux
, const char *name
)
402 struct zsc_attach_args
*args
= aux
;
405 aprint_normal("%s: ", name
);
407 if (args
->channel
!= -1)
408 aprint_normal(" channel %d", args
->channel
);
416 struct zsc_softc
*zsc
= arg
;
420 while ((rr3
= zsc_intr_hard(zsc
))) {
421 /* Count up the interrupts. */
423 zsc
->zsc_intrcnt
.ev_count
++;
425 if (((zsc
->zsc_cs
[0] && zsc
->zsc_cs
[0]->cs_softreq
) ||
426 (zsc
->zsc_cs
[1] && zsc
->zsc_cs
[1]->cs_softreq
)) &&
428 softint_schedule(zsc
->zsc_softintr
);
434 zscheckintr(void *arg
)
436 struct zsc_softc
*zsc
;
440 for (unit
= 0; unit
< zs_cd
.cd_ndevs
; unit
++) {
442 zsc
= device_lookup_private(&zs_cd
, unit
);
445 rval
= (zshard((void *)zsc
) || rval
);
452 * We need this only for TTY_DEBUG purposes.
457 struct zsc_softc
*zsc
= arg
;
460 /* Make sure we call the tty layer with tty_lock held. */
461 mutex_spin_enter(&tty_lock
);
463 (void)zsc_intr_soft(zsc
);
466 struct zstty_softc
*zst0
= zsc
->zsc_cs
[0]->cs_private
;
467 struct zstty_softc
*zst1
= zsc
->zsc_cs
[1]->cs_private
;
468 if (zst0
->zst_overflows
|| zst1
->zst_overflows
) {
469 struct trapframe
*frame
= (struct trapframe
*)arg
;
471 printf("zs silo overflow from %p\n",
477 mutex_spin_exit(&tty_lock
);
483 * Compute the current baud rate given a ZS channel.
486 zs_get_speed(struct zs_chanstate
*cs
)
490 tconst
= zs_read_reg(cs
, 12);
491 tconst
|= zs_read_reg(cs
, 13) << 8;
492 return (TCONST_TO_BPS(cs
->cs_brg_clk
, tconst
));
496 * MD functions for setting the baud rate and control modes.
499 zs_set_speed(struct zs_chanstate
*cs
, int bps
/* bits per second */)
501 int tconst
, real_bps
;
507 if (cs
->cs_brg_clk
== 0)
508 panic("zs_set_speed");
511 tconst
= BPS_TO_TCONST(cs
->cs_brg_clk
, bps
);
515 /* Convert back to make sure we can do it. */
516 real_bps
= TCONST_TO_BPS(cs
->cs_brg_clk
, tconst
);
518 /* XXX - Allow some tolerance here? */
522 cs
->cs_preg
[12] = tconst
;
523 cs
->cs_preg
[13] = tconst
>> 8;
525 /* Caller will stuff the pending registers. */
530 zs_set_modes(struct zs_chanstate
*cs
, int cflag
)
534 * Output hardware flow control on the chip is horrendous:
535 * if carrier detect drops, the receiver is disabled, and if
536 * CTS drops, the transmitter is stoped IN MID CHARACTER!
537 * Therefore, NEVER set the HFC bit, and instead use the
538 * status interrupt to detect CTS changes.
542 if ((cflag
& (CLOCAL
| MDMBUF
)) != 0) {
544 if ((cflag
& MDMBUF
) == 0)
545 cs
->cs_rr0_pps
= ZSRR0_DCD
;
547 cs
->cs_rr0_dcd
= ZSRR0_DCD
;
548 if ((cflag
& CRTSCTS
) != 0) {
549 cs
->cs_wr5_dtr
= ZSWR5_DTR
;
550 cs
->cs_wr5_rts
= ZSWR5_RTS
;
551 cs
->cs_rr0_cts
= ZSRR0_CTS
;
552 } else if ((cflag
& CDTRCTS
) != 0) {
554 cs
->cs_wr5_rts
= ZSWR5_DTR
;
555 cs
->cs_rr0_cts
= ZSRR0_CTS
;
556 } else if ((cflag
& MDMBUF
) != 0) {
558 cs
->cs_wr5_rts
= ZSWR5_DTR
;
559 cs
->cs_rr0_cts
= ZSRR0_DCD
;
561 cs
->cs_wr5_dtr
= ZSWR5_DTR
| ZSWR5_RTS
;
567 /* Caller will stuff the pending registers. */
573 * Read or write the chip with suitable delays.
577 zs_read_reg(struct zs_chanstate
*cs
, u_char reg
)
581 *cs
->cs_reg_csr
= reg
;
583 val
= *cs
->cs_reg_csr
;
589 zs_write_reg(struct zs_chanstate
*cs
, u_char reg
, u_char val
)
591 *cs
->cs_reg_csr
= reg
;
593 *cs
->cs_reg_csr
= val
;
598 zs_read_csr(struct zs_chanstate
*cs
)
602 val
= *cs
->cs_reg_csr
;
608 zs_write_csr(struct zs_chanstate
*cs
, u_char val
)
610 *cs
->cs_reg_csr
= val
;
615 zs_read_data(struct zs_chanstate
*cs
)
619 val
= *cs
->cs_reg_data
;
625 zs_write_data(struct zs_chanstate
*cs
, u_char val
)
627 *cs
->cs_reg_data
= val
;
631 /****************************************************************
632 * Console support functions (Sun specific!)
633 * Note: this code is allowed to know about the layout of
634 * the chip registers, and uses that to keep things simple.
635 * XXX - I think I like the mvme167 code better. -gwr
636 ****************************************************************/
638 extern void Debugger(void);
641 * Handle user request to enter kernel debugger.
644 zs_abort(struct zs_chanstate
*cs
)
646 volatile struct zschan
*zc
= zs_conschan_get
;
649 /* Wait for end of break to avoid PROM abort. */
650 /* XXX - Limit the wait? */
654 } while (rr0
& ZSRR0_BREAK
);
660 extern int db_active
;
665 /* Debugger is probably hozed */
669 printf("stopping on keyboard abort\n");
681 volatile struct zschan
*zc
= arg
;
685 /* Wait for a character to arrive. */
689 } while ((rr0
& ZSRR0_RX_READY
) == 0);
696 * This is used by the kd driver to read scan codes,
697 * so don't translate '\r' ==> '\n' here...
703 * Polled output char.
706 zs_putc(void *arg
, int c
)
708 volatile struct zschan
*zc
= arg
;
713 /* Wait for transmitter to become ready. */
717 } while ((rr0
& ZSRR0_TX_READY
) == 0);
720 * Send the next character.
721 * Now you'd think that this could be followed by a ZS_DELAY()
722 * just like all the other chip accesses, but it turns out that
723 * the `transmit-ready' interrupt isn't de-asserted until
724 * some period of time after the register write completes
725 * (more than a couple instructions). So to avoid stray
726 * interrupts we put in the 2us delay regardless of CPU model.
734 /*****************************************************************/
740 * Polled console input putchar.
745 return (zs_getc(zs_conschan_get
));
749 * Polled console output putchar.
752 zscnputc(dev_t dev
, int c
)
754 zs_putc(zs_conschan_put
, c
);
760 zscnpollc(dev_t dev
, int on
)
763 * Need to tell zs driver to acknowledge all interrupts or we get
764 * annoying spurious interrupt messages. This is because mucking
765 * with spl() levels during polling does not prevent interrupts from
769 if (on
) swallow_zsintrs
++;
770 else swallow_zsintrs
--;
774 zs_console_flags(int promunit
, int node
, int channel
)
776 int cookie
, flags
= 0;
780 * We'll just do the OBP grovelling down here since that's
781 * the only type of firmware we support.
784 /* Default to channel 0 if there are no explicit prom args */
786 if (node
== prom_instance_to_package(prom_stdin())) {
787 if (prom_getoption("input-device", buf
, sizeof buf
) == 0 &&
788 strcmp("ttyb", buf
) == 0)
791 if (channel
== cookie
)
792 flags
|= ZS_HWFLAG_CONSOLE_INPUT
;
795 if (node
== prom_instance_to_package(prom_stdout())) {
796 if (prom_getoption("output-device", buf
, sizeof buf
) == 0 &&
797 strcmp("ttyb", buf
) == 0)
800 if (channel
== cookie
)
801 flags
|= ZS_HWFLAG_CONSOLE_OUTPUT
;