1 /* $NetBSD: pte.h,v 1.7 2008/04/28 20:23:37 martin Exp $ */
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29 #ifndef _MACHINE_PTE_H
30 #define _MACHINE_PTE_H
34 #define SEGINV (NPMEG-1)
39 * In our zeal to use the sun3 pmap with as few changes as possible,
40 * we pretend that sun2 page table entries work more like their sun3
41 * counterparts. Namely, we pretend that they simply have PG_WRITE
42 * and PG_SYSTEM bits, and we use get_pte and set_pte to translate
43 * entries between the two styles.
45 * All known valid protections in a real sun2 PTE are given in
46 * (disabled) defines below, and are displayed as bitmaps here:
51 * 1 1 1 0 0 PG_KW => a read/write kernel-only page.
52 * 1 0 1 0 0 PG_KR => a read-only kernel-only page.
53 * 1 1 1 1 1 PG_UW => a read/write kernel/user page.
54 * 1 0 1 1 0 PG_URKR => a read-only kernel/user page.
56 * The sun3 PTE protections we want to emulate are:
58 * PG_SYSTEM | PG_WRITE => a read/write kernel-only page.
59 * PG_SYSTEM => a read-only kernel-only page.
60 * PG_WRITE => a read/write kernel/user page.
61 * => a read-only kernel/user page.
63 * We want to assign values to PG_SYSTEM and PG_WRITE, and
64 * craft get_pte and set_pte to do a translation from and to the real
65 * hardware protections.
67 * We begin by noting that bits 30 and 28 are set in all known valid
68 * sun2 protections. Since we assume that the kernel can always read
69 * all pages in the system, we might as well call one of them the
70 * "kernel readable" bit, and say that the other is just always on.
71 * We deem bit 30 the "kernel readable" bit. There is some evidence
72 * that bit 28 may mean "not a device" (the PROM makes PTEs for its
73 * device mappings with bit 28 clear), but I'm not sure enough about
74 * this to do anything about it. So, set_pte will always set these
75 * bits when it loads a valid PTE, and get_pte will always clear them
76 * when it unloads a valid PTE.
78 * Bit 25, which SunOS calles the "fill on demand" bit, also needs
79 * to be set on all valid PTEs. Dunno any more about this bit.
81 * Next, we see that bit 27 is set for all pages the user can access,
82 * and clear otherwise. This bit has the opposite meaning of the sun3
83 * PG_SYSTEM bit, but that's OK - we will just define PG_SYSTEM to be
84 * bit 27, and set_pte and get_pte will invert it when loading or
85 * unloading a valid PTE.
87 * Bit 29 is set for all pages the kernel can write to. We define
88 * PG_WRITE to be bit 29. No inverting is done.
90 * That leaves us to take care of bit 26. This bit, and bit 27, need
91 * to be set for all pages the user can write to. On the sun3, all
92 * user-accessible pages that the kernel can write to, the user can
93 * also write to. We can use this fact to make set_pte set bit 26 iff
94 * the kernel can write to the page (PG_WRITE is set), and the user
95 * can also access the page (bit 27 is set, i.e., PG_SYSTEM was clear
96 * before set_pte inverted it).
98 * This is what makes set_pte tricky. It begins by clearing bit 26
99 * (this is paranoia, if all is working well, this bit should never be
100 * set in our pseudo-sun3 PTEs). It then flips PG_SYSTEM to become
101 * the user-accessible bit. Lastly, as the tricky part, it sets bits
102 * 30 and 28, *and* sets bit 26 by shifting the expression (pte &
103 * PG_WRITE) right by two to move the resulting "single bit" into the
104 * bit 27 position, ANDing that with bit 27 in the PTE (the
105 * user-accessible bit), shifting that right once more to line up with
106 * the target bit 26 in the PTE, and ORing it in. This will result in
107 * bit 26 being set if the pseudo-sun3 protection was simply PG_WRITE.
109 * This could be expressed with if .. else.. logic, but the bit
110 * shifts should compile into something that needs no branching.
112 * get_pte's job is easier. All it has to do is clear the always-set
113 * bits 30, 28, and 25, *and* clear bit 26, and flip PG_SYSTEM. It can
114 * clear bit 26 because the value that was there can always be derived
115 * from the resulting pseudo-sun3 PG_SYSTEM and PG_WRITE combination.
117 * And that's how we reuse the sun3 pmap.
119 #define PG_VALID 0x80000000
120 #define PG_WRITE 0x20000000
121 #define PG_NC 0x00000000
122 #define PG_SYSTEM 0x08000000
124 #define PG_KW 0x70000000
125 #define PG_KR 0x50000000
126 #define PG_UW 0x7C000000
127 #define PG_URKR 0x58000000
129 #define PG_TYPE 0x00C00000
130 #define PG_REF 0x00200000
131 #define PG_MOD 0x00100000
133 #define PG_SPECIAL (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC|PG_REF|PG_MOD)
134 #define PG_PERM (PG_VALID|PG_WRITE|PG_SYSTEM|PG_NC)
135 #define PG_MODREF (PG_REF|PG_MOD)
136 #define PG_FRAME 0x00000FFF
138 #define PG_MOD_SHIFT 20
141 * At first glance, the need for two page types for the VME
142 * bus on the sun2 isn't obvious - it's a single 16 bit wide
143 * bus with 24 address lines, with the A16 devices simply
144 * found starting at addresses 0xff0000. No problem - use
145 * only one page type. But the sun2 VM page frame is only 12
146 * bits wide, with 11 bit wide page offsets, meaning only 23
147 * address bits, not enough to cover the entire VME bus. So
148 * we have two page types, with the low bit of the page type
149 * representing the 24th VME bus address bit.
153 #define MBMEM 2 /* on the 2/120 */
154 #define VME0 2 /* on the 2/50 (VME addresses [0..0x7fffff]) */
155 #define MBIO 3 /* on the 2/120 */
156 #define VME8 3 /* on the 2/50 (VME addresses [0x800000..0xffffff]) */
157 #define PG_TYPE_SHIFT 22
161 #define MAKE_PGTYPE(x) ((x) << PG_TYPE_SHIFT)
162 #define PG_PFNUM(pte) (pte & PG_FRAME)
163 #define PG_PA(pte) (PG_PFNUM(pte) << PGSHIFT)
165 #define PGT_MASK MAKE_PGTYPE(3)
166 #define PGT_OBMEM MAKE_PGTYPE(OBMEM) /* onboard memory */
167 #define PGT_OBIO MAKE_PGTYPE(OBIO) /* onboard I/O */
168 #define PGT_MBMEM MAKE_PGTYPE(MBMEM) /* on the 2/120 */
169 #define PGT_VME0 MAKE_PGTYPE(VME0) /* on the 2/50 */
170 #define PGT_MBIO MAKE_PGTYPE(MBIO) /* on the 2/120 */
171 #define PGT_VME8 MAKE_PGTYPE(VME8) /* on the 2/50 */
173 #define VA_SEGNUM(x) ((u_int)(x) >> SEGSHIFT)
175 #define VA_PTE_NUM_SHIFT PGSHIFT
176 #define VA_PTE_NUM_MASK (((1 << SEGSHIFT) - 1) ^ ((1 << PGSHIFT) - 1))
177 #define VA_PTE_NUM(va) (((va) & VA_PTE_NUM_MASK) >> VA_PTE_NUM_SHIFT)
179 #define PA_PGNUM(pa) ((unsigned)(pa) >> PGSHIFT)
181 #if defined(_KERNEL) || defined(_STANDALONE)
182 #define kernel_context() get_context(); set_context(0)
183 #define restore_context set_context
184 u_int
get_pte(vaddr_t
);
185 void set_pte(vaddr_t
, u_int
);
188 #endif /* _MACHINE_PTE_H */