sys/arch/sun3/dev/sereg.h

   1 /*      $NetBSD: sereg.h,v 1.5 2003/05/03 18:11:04 wiz Exp $    */
   2
   3 /*-
   4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to The NetBSD Foundation
   8  * by Gordon W. Ross.
   9  *
  10  * Redistribution and use in source and binary forms, with or without
  11  * modification, are permitted provided that the following conditions
  12  * are met:
  13  * 1. Redistributions of source code must retain the above copyright
  14  *    notice, this list of conditions and the following disclaimer.
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  *    notice, this list of conditions and the following disclaimer in the
  17  *    documentation and/or other materials provided with the distribution.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * Sun3/E SCSI/Ethernet board.  This is a VME board with some memory,
  34  * an Intel Ether, and an NCR5380 SCSI with a cheap DMA engine.
  35  */
  36
  37 /*****************************************************************
  38  * Register definitions for the SCSI portion.
  39  * (size=0x20)
  40  */
  41 struct se_regs {
  42         u_char                  ncrregs[8];
  43         u_short                 unused1;
  44         u_short                 dma_addr;       /* DMA offset register  */
  45         u_short                 unused2;
  46         u_short                 dma_cntr;       /* DMA count down register */
  47         u_short                 unused3[5];
  48         u_short                 se_csr;         /* control/status register */
  49         u_short                 unused4;
  50         u_short                 se_ivec;        /* interrupt vector     */
  51 };
  52
  53 /*
  54  * SCSI Control and Status Register.
  55  * Note:
  56  *      (ro)    indicates bit is read only.
  57  *      (rw)    indicates bit is read or write.
  58  */
  59 #define SE_CSR_SBC_IP           0x0200  /* (ro) sbc interrupt pending */
  60 #define SE_CSR_SEND             0x0008  /* (rw) DMA dir, 1=to device */
  61 #define SE_CSR_INTR_EN          0x0004  /* (rw) interrupts enable */
  62 #define SE_CSR_VCC              0x0002  /* (ro) power signal to the chip */
  63 #define SE_CSR_SCSI_RES         0x0001  /* (rw) reset sbc and udc, 0=reset */
  64
  65
  66 /*****************************************************************
  67  * Register definitions for the Ethernet portion.
  68  * (size=0x100)
  69  */
  70 struct ie_regs {
  71         u_short                 ie_pad0;
  72         u_short                 ie_csr;
  73         u_short                 ie_pad1[7];
  74         u_short                 ie_ivec;        /* interrupt vector */
  75         u_short                 ie_pad3[128-10];
  76 };
  77
  78 /*
  79  * Ether Control and Status Register.
  80  */
  81 #define IE_CSR_RESET            0x8000  /* board reset */
  82 #define IE_CSR_NOLOOP           0x4000  /* loopback disable */
  83 #define IE_CSR_ATTEN            0x2000  /* channel attention */
  84 #define IE_CSR_IENAB            0x1000  /* interrupt enable */
  85 #define IE_CSR_IPEND            0x0100  /* interrupt pending */
  86
  87
  88 /*****************************************************************
  89  * Register definitions for the entire SCSI/Ethernet board.
  90  * I had the impression that there were overlaps in this map,
  91  * which was the reason for existence of the "sebuf" driver.
  92  * Now it looks like the "sebuf" driver was unnecessary. XXX
  93  */
  94
  95 #define SE_NCRBUFSIZE   0x10000
  96 #define SE_IEBUFSIZE    0x20000
  97 struct sebuf_regs {
  98         char    se_scsi_buf[SE_NCRBUFSIZE];
  99         struct se_regs se_scsi_regs;
 100         char    se_pad[0x10000 - 0x120];
 101         struct ie_regs se_eth_regs;
 102         char    se_eth_buf[SE_IEBUFSIZE];
 103 };      /* 128KB total */