1 /* $NetBSD: cg2reg.h,v 1.4.2.3 2004/09/21 13:23:27 skrll Exp $ */
4 * Copyright (c) 1994 Dennis Ferguson
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 /* cg2reg.h - CG2 colour frame buffer definitions
30 * The mapped memory looks like:
33 * 0x000000 bit plane map - 1st (of 8) plane used by the X server in -mono mode
34 * 0x100000 pixel map - used by the X server in color mode
35 * 0x200000 raster op mode memory map - unused by X server
36 * 0x300000 random control registers (lots of spaces in between)
37 * 0x310000 shadow colour map
40 /* Frame buffer memory size and depth */
41 #define CG2_FBSIZE (1024 * 1024)
44 /* Screen dimensions */
45 #define CG2_WIDTH 1152
46 #define CG2_HEIGHT 900
48 /* arrangement of bit plane mode memory */
50 u_short word
[CG2_HEIGHT
][CG2_WIDTH
/(CG2_N_PLANE
* sizeof(u_short
))];
51 u_short plane
[CG2_FBSIZE
/(CG2_N_PLANE
* sizeof(u_short
))];
54 /* arrangement of pixel mode memory */
56 u_char pixel
[CG2_HEIGHT
][CG2_WIDTH
];
57 u_char frame
[CG2_FBSIZE
];
62 * Structure describing the first two megabytes of the frame buffer.
63 * Normal memory maps in bit plane and pixel modes
66 union bitplane memplane
[CG2_N_PLANE
]; /* bit plane map */
67 union byteplane pixplane
; /* pixel map */
72 * Control/status register. The X server only appears to use update_cmap
76 u_int reserved
: 2; /* not used */
77 u_int fastread
: 1; /* r/o: has some feature I don't understand */
78 u_int id
: 1; /* r/o: ext status and ID registers exist */
79 u_int resolution
: 4; /* screen resolution, 0 means 1152x900 */
80 u_int retrace
: 1; /* r/o: retrace in progress */
81 u_int inpend
: 1; /* r/o: interrupt request */
82 u_int ropmode
: 3; /* ?? */
83 u_int inten
: 1; /* interrupt enable (for end of retrace) */
84 u_int update_cmap
: 1; /* copy/use shadow colour map */
85 u_int video_enab
: 1; /* enable video */
90 * Extended status register. Unused by X server
92 struct cg2_extstatus
{
93 u_int gpintreq
: 1; /* interrupt request */
94 u_int gpintdis
: 1; /* interrupt disable */
95 u_int reserved
: 13; /* unused */
96 u_int gpbus
: 1; /* bus enabled */
101 * Double buffer control register. It appears that (some of?) the
102 * cg2 cards support a pair of memory sets, referred to as `A' and
103 * `B', which can be swapped to allow atomic screen updates. This
107 u_int display_b
: 1; /* display memory B (set) or A (reset) */
108 u_int read_b
: 1; /* accesss memory B (set) or A (reset) */
109 u_int nowrite_b
: 1; /* when set, writes don't update memory B */
110 u_int nowrite_a
: 1; /* when set, writes don't update memory A */
111 u_int read_ecmap
: 1; /* copy from(clear)/to(set) shadow colour map */
112 u_int fast_read
: 1; /* fast reads, but wrong data */
113 u_int wait
: 1; /* when set, remains so to end up v. retrace */
114 u_int update_ecmap
: 1; /* copy/use shadow colour map */
120 * Zoom register, apparently present on Sun-2 colour boards only. See
121 * the Sun documentation, I don't know anyone who still has a Sun-2.
126 u_char reg_pad
[4096];
135 u_char reg_pad
[4096];
144 u_char reg_pad
[4096];
148 u_char reg_pad
[4096];
154 * Miscellany. On the Sun-3 these registers exist in place of the above.
157 union { /* double buffer register (see above) */
158 struct dblbufreg reg
;
160 u_char reg_pad
[4096];
162 union { /* start of DMA window */
164 u_char reg_pad
[4096];
166 union { /* DMA window size */
167 u_short reg
; /* actually 8 bits. reg*16 == size */
168 u_char reg_pad
[4096];
170 union { /* frame count */
171 u_short reg
; /* actually 8 bits only. r/o */
172 u_char reg_pad
[4096];
178 * Raster op control registers. X doesn't use this, but documented here
179 * for future reference.
192 u_short mrc_decoderout
;
202 * Last chunk of the frame buffer (i.e. from offset 0x200000 and above).
203 * Exists separately from struct cg2memfb apparently because Sun software
204 * avoids mapping the latter, though X uses it.
208 #ifndef _KERNEL /* XXX - Hack! */
209 /* XXX - Don't want this permanently in the kernel mapping. */
210 union { /* raster op mode frame memory */
211 union bitplane ropplane
[CG2_N_PLANE
];
212 union byteplane roppixel
;
214 #endif /* _KERNEL XXX - Hack! */
216 union { /* raster op control unit (1 per plane) */
217 struct memropc ropregs
;
220 struct memropc ropregs
;
222 u_char reg_pad
[4096];
224 union { /* status register */
225 struct cg2statusreg reg
;
227 u_char reg_pad
[4096];
229 union { /* per-plane mask register */
230 u_short reg
; /* 8 bit mask register - set means plane r/w */
231 u_char reg_pad
[4096];
233 union { /* miscellaneous registers */
234 struct cg2_zoom zoom
;
235 struct cg2_nozoom nozoom
;
237 union { /* interrupt vector */
241 union { /* board ID */
245 union { /* extended status */
246 struct cg2_extstatus reg
;
250 union { /* auxiliary raster op mode register (?)*/
252 u_char reg_pad
[4032];
254 u_short redmap
[256]; /* shadow colour maps */
255 u_short greenmap
[256];
256 u_short bluemap
[256];