sys/arch/vax/include/intr.h

   1 /*      $NetBSD: intr.h,v 1.28 2009/05/06 21:41:59 mhitch Exp $ */
   2
   3 /*
   4  * Copyright (c) 1998 Matt Thomas.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  * 3. The name of the company nor the name of the author may be used to
  16  *    endorse or promote products derived from this software without specific
  17  *    prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
  20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  29  * SUCH DAMAGE.
  30  */
  31
  32 #ifndef _VAX_INTR_H_
  33 #define _VAX_INTR_H_
  34
  35 #include <sys/queue.h>
  36 #include <machine/mtpr.h>
  37
  38 /* Define the various Interrupt Priority Levels */
  39
  40 /* Interrupt Priority Levels are not mutually exclusive. */
  41
  42 /* Hardware interrupt levels are 16 (0x10) thru 31 (0x1f) */
  43 #define IPL_HIGH        0x1f    /* high -- blocks all interrupts */
  44 #define IPL_SCHED       0x18    /* clock */
  45 #define IPL_VM          0x17    /* memory allocation */
  46
  47 /* Software interrupt levels are 0 (0x00) thru 15 (0x0f) */
  48 #define IPL_SOFTDDB     0x0f    /* used by DDB on VAX */
  49 #define IPL_SOFTSERIAL  0x0d    /* soft serial */
  50 #define IPL_SOFTNET     0x0c    /* soft network */
  51 #define IPL_SOFTBIO     0x0b    /* soft bio */
  52 #define IPL_SOFTCLOCK   0x08
  53 #define IPL_NONE        0x00
  54
  55 /* vax weirdness */
  56 #define IPL_UBA         IPL_VM  /* unibus adapters */
  57 #define IPL_CONSMEDIA   IPL_VM  /* console media */
  58
  59 /* Misc */
  60 #define IPL_LEVELS      32
  61
  62 #define IST_UNUSABLE    -1      /* interrupt cannot be used */
  63 #define IST_NONE        0       /* none (dummy) */
  64 #define IST_PULSE       1       /* pulsed */
  65 #define IST_EDGE        2       /* edge-triggered */
  66 #define IST_LEVEL       3       /* level-triggered */
  67
  68
  69 #ifdef _KERNEL
  70 typedef int ipl_t;
  71
  72 static inline void
  73 _splset(ipl_t ipl)
  74 {
  75         mtpr(ipl, PR_IPL);
  76 }
  77
  78 static inline ipl_t
  79 _splget(void)
  80 {
  81         return mfpr(PR_IPL);
  82 }
  83
  84 static inline ipl_t
  85 splx(ipl_t new_ipl)
  86 {
  87         ipl_t old_ipl = _splget();
  88         _splset(new_ipl);
  89         return old_ipl;
  90 }
  91
  92 typedef struct {
  93         uint8_t _ipl;
  94 } ipl_cookie_t;
  95
  96 static inline ipl_cookie_t
  97 makeiplcookie(ipl_t ipl)
  98 {
  99         return (ipl_cookie_t){._ipl = (uint8_t)ipl};
 100 }
 101
 102 static inline int
 103 splraiseipl(ipl_cookie_t icookie)
 104 {
 105         ipl_t newipl = icookie._ipl;
 106         ipl_t oldipl;
 107
 108         oldipl = _splget();
 109         if (newipl > oldipl) {
 110                 _splset(newipl);
 111         }
 112         return oldipl;
 113 }
 114
 115
 116 #define spl0()          _splset(IPL_NONE)               /* IPL00 */
 117 #define splddb()        splraiseipl(makeiplcookie(IPL_SOFTDDB)) /* IPL0F */
 118 #define splconsmedia()  splraiseipl(makeiplcookie(IPL_CONSMEDIA)) /* IPL17 */
 119
 120 #include <sys/spl.h>
 121
 122 /* These are better to use when playing with VAX buses */
 123 #define spluba()        splraiseipl(makeiplcookie(IPL_UBA)) /* IPL17 */
 124 #define spl7()          splvm()
 125
 126 /* schedule software interrupts
 127  */
 128 #define setsoftddb()    ((void)mtpr(IPL_SOFTDDB, PR_SIRR))
 129
 130 #if !defined(_LOCORE)
 131
 132 #if defined(__HAVE_FAST_SOFTINTS)
 133 static inline void
 134 softint_trigger(uintptr_t machdep)
 135 {
 136         mtpr(machdep, PR_SIRR);
 137 }
 138 #endif /* __HAVE_FAST_SOFTINTS */
 139 #endif /* !_LOCORE */
 140 #endif /* _KERNEL */
 141 #endif  /* _VAX_INTR_H */