sys/arch/vax/include/ka650.h

   1 /*      $NetBSD: ka650.h,v 1.9.6.3 2004/09/21 13:23:43 skrll Exp $      */
   2 /*
   3  * Copyright (c) 1988 The Regents of the University of California.
   4  * All rights reserved.
   5  *
   6  * This code is derived from software contributed to Berkeley by
   7  * Mt. Xinu.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. Neither the name of the University nor the names of its contributors
  18  *    may be used to endorse or promote products derived from this software
  19  *    without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31  * SUCH DAMAGE.
  32  *
  33  *      @(#)ka650.h     7.5 (Berkeley) 6/28/90
  34  */
  35
  36 #ifndef _VAX_KA650_H_
  37 #define _VAX_KA650_H_
  38
  39 /*
  40  *
  41  * Definitions specific to the ka650 (uVAX 3600/3602) CPU card.
  42  */
  43
  44 /*
  45  * CAER: Memory System Error Register (IPR 39)
  46  */
  47 #define CAER_DAL        0x00000040      /* CDAL or level 2 cache data parity */
  48 #define CAER_MCD        0x00000020      /* mcheck due to DAL parity error */
  49 #define CAER_MCC        0x00000010      /* mcheck due to 1st lev cache parity */
  50 #define CAER_DAT        0x00000002      /* data parity in 1st level cache */
  51 #define CAER_TAG        0x00000001      /* tag parity in 1st level cache */
  52
  53 /*
  54  * CADR: Cache Disable Register (IPR 37)
  55  */
  56 #define CADR_STMASK     0x000000f0      /* 1st level cache state mask */
  57 #define CADR_SEN2       0x00000080      /* 1st level cache set 2 enabled */
  58 #define CADR_SEN1       0x00000040      /* 1st level cache set 1 enabled */
  59 #define CADR_CENI       0x00000020      /* 1st level I-stream caching enabled */
  60 #define CADR_CEND       0x00000010      /* 1st level D-stream caching enabled */
  61
  62 /*
  63  * Internal State Info 2: (for mcheck recovery)
  64  */
  65 #define IS2_VCR         0x00008000      /* VAX Can't Restart flag */
  66
  67 /*
  68  * DMA System Error Register (merr_dser)
  69  */
  70 #define DSER_QNXM       0x00000080      /* Q-22 Bus NXM */
  71 #define DSER_QPE        0x00000020      /* Q-22 Bus parity Error */
  72 #define DSER_MEM        0x00000010      /* Main mem err due to ext dev DMA */
  73 #define DSER_LOST       0x00000008      /* Lost error: DSER <7,5,4,0> set */
  74 #define DSER_NOGRANT    0x00000004      /* No Grant timeout on CPU demand R/W */
  75 #define DSER_DNXM       0x00000001      /* DMA NXM */
  76 #define DSER_CLEAR      (DSER_QNXM | DSER_QPE | DSER_MEM |  \
  77                          DSER_LOST | DSER_NOGRANT | DSER_DNXM)
  78 #define DMASER_BITS \
  79 "\20\20BHALT\17DCNEG\10QBNXM\6QBPE\5MEMERR\4LOSTERR\3NOGRANT\1DMANXM"
  80
  81 #ifndef _LOCORE
  82 /*
  83  * Local registers (in I/O space)
  84  * This is done in disjoint sections.  Map names are set in locore.s
  85  * and they are mapped in routine configcpu()
  86  */
  87
  88 /*
  89  * memory error & configuration registers
  90  */
  91 struct ka650_merr {
  92         u_long  merr_scr;       /* System Config Register */
  93         u_long  merr_dser;      /* DMA System Error Register */
  94         u_long  merr_qbear;     /* QBus Error Address Register */
  95         u_long  merr_dear;      /* DMA Error Address Register */
  96         u_long  merr_qbmbr;     /* Q Bus Map Base address Register */
  97         u_long  pad[59];
  98         u_long  merr_csr[16];   /* Main Memory Config Regs (16 banks) */
  99         u_long  merr_errstat;   /* Main Memory Error Status */
 100         u_long  merr_cont;      /* Main Memory Control */
 101 };
 102 #define KA650_MERR      0x20080000
 103
 104 /*
 105  * Main Memory Error Status Register (merr_errstat)
 106  */
 107 #define MEM_EMASK       0xe0000180      /* mask of all err bits */
 108 #define MEM_RDS         0x80000000      /* uncorrectable main memory */
 109 #define MEM_RDSHIGH     0x40000000      /* high rate RDS errors */
 110 #define MEM_CRD         0x20000000      /* correctable main memory */
 111 #define MEM_DMA         0x00000100      /* DMA read or write error */
 112 #define MEM_CDAL        0x00000080      /* CDAL Parity error on write */
 113 #define MEM_PAGE        0x1ffffe00      /* Offending Page Number */
 114 #define MEM_PAGESHFT    9               /* Shift to normalize page number */
 115
 116 /*
 117  * Main Memory Control & Diag Status Reg (merr_cont)
 118  */
 119 #define MEM_CRDINT      0x00001000      /* CRD interrupts enabled */
 120 #define MEM_REFRESH     0x00000800      /* Forced memory refresh */
 121 #define MEM_ERRDIS      0x00000400      /* error detect disable */
 122 #define MEM_DIAG        0x00000080      /* Diagnostics mode */
 123 #define MEM_CHECK       0x0000007f      /* check bits for diagnostic mode */
 124
 125 /*
 126  * Main Memory Config Regs (merr_csr[0-15])
 127  */
 128 #define MEM_BNKENBLE    0x80000000      /* Bank Enable */
 129 #define MEM_BNKNUM      0x03c00000      /* Physical map Bank number */
 130 #define MEM_BNKUSAGE    0x00000003      /* Bank Usage */
 131
 132 /*
 133  * Cache Control & Boot/Diag registers
 134  */
 135 struct ka650_cbd {
 136         u_char  cbd_cacr;       /* Low byte: Cache Enable & Parity Err detect */
 137         u_char  cbd_cdf1;       /* Cache diagnostic field (unused) */
 138         u_char  cbd_cdf2;       /* Cache diagnostic field (unused) */
 139         u_char  pad;
 140         u_long  cbd_bdr;        /* Boot & Diagnostic Register (unused) */
 141 };
 142 #define KA650_CBD       0x20084000
 143
 144 /*
 145  * CACR: Cache Control Register (2nd level cache) (cbd_cacr)
 146  */
 147 #define CACR_CEN        0x00000010      /* Cache enable */
 148 #define CACR_CPE        0x00000020      /* Cache Parity Error */
 149
 150 /*
 151  * System Support Chip (SSC) registers
 152  */
 153 struct ka650_ssc {
 154         u_long  ssc_sscbr;      /* SSC Base Addr Register */
 155         u_long  pad1[3];
 156         u_long  ssc_ssccr;      /* SSC Configuration Register */
 157         u_long  pad2[3];
 158         u_long  ssc_cbtcr;      /* CDAL Bus Timeout Control Register */
 159         u_long  pad3[55];
 160         u_long  ssc_tcr0;       /* timer control reg 0 */
 161         u_long  ssc_tir0;       /* timer interval reg 0 */
 162         u_long  ssc_tnir0;      /* timer next interval reg 0 */
 163         u_long  ssc_tivr0;      /* timer interrupt vector reg 0 */
 164         u_long  ssc_tcr1;       /* timer control reg 1 */
 165         u_long  ssc_tir1;       /* timer interval reg 1 */
 166         u_long  ssc_tnir1;      /* timer next interval reg 1 */
 167         u_long  ssc_tivr1;      /* timer interrupt vector reg 1 */
 168         u_long  pad4[184];
 169         u_char  ssc_cpmbx;      /* Console Program Mail Box: Lang & Hact */
 170         u_char  ssc_terminfo;   /* TTY info: Video Dev, MCS, CRT & ROM flags */
 171         u_char  ssc_keyboard;   /* Keyboard code */
 172 };
 173 #define KA650_SSC       0x20140000
 174
 175 /*
 176  * CBTCR: CDAL Bus Timeout Control Register (ssc_cbtcr)
 177  */
 178 #define CBTCR_BTO       0x80000000      /* r/w unimp IPR or unack intr */
 179 #define CBTCR_RWT       0x40000000      /* CDAL Bus Timeout on CPU or DMA */
 180
 181 /*
 182  * TCR0/TCR1: Programable Timer Control Registers (ssc_tcr[01])
 183  * (The rest of the bits are the same as in the standard VAX
 184  *      Interval timer and are defined in clock.h)
 185  */
 186 #define TCR_STP         0x00000004      /* Stop after time-out */
 187
 188 /*
 189  * Flags for Console Program Mail Box
 190  */
 191 #define CPMB650_HALTACT 0x03    /* Field for halt action */
 192 #define CPMB650_RESTART 0x01    /* Restart */
 193 #define CPMB650_REBOOT  0x02    /* Reboot */
 194 #define CPMB650_HALT    0x03    /* Halt */
 195 #define CPMB650_BIP     0x04    /* Bootstrap in progress */
 196 #define CPMB650_RIP     0x08    /* Restart in progress */
 197 #define CPMB650_DOTHIS  0x30    /* Execute sommand */
 198 #define CPMB650_LANG    0xf0    /* Language field */
 199
 200 /*
 201  * Inter Processor Communication Register
 202  * To determine if memory error was from QBUS device DMA (as opposed to CPU).
 203  */
 204 struct ka650_ipcr {
 205         u_long  pad[80];
 206         u_short ipcr0;          /* InterProcessor Comm Reg for arbiter */
 207 };
 208 #define KA650_IPCR      0x20001e00
 209
 210 #endif  /* _LOCORE */
 211
 212 /*
 213  * Physical start address of the Qbus memory.
 214  * The q-bus memory size is 4 meg.
 215  * Physical start address of the I/O space (where the 8Kbyte I/O page is).
 216  */
 217 #define KA650_QMEM      0x30000000
 218 #define KA650_QMEMSIZE  (512*8192)
 219 #define KA650_QDEVADDR  0x20000000
 220
 221 /*
 222  * Mapping info for Cache Entries, including
 223  * Size (in bytes) of 2nd Level Cache for cache flush operation
 224  */
 225 #define KA650_CACHE     0x10000000
 226 #define KA650_CACHESIZE (64*1024)
 227
 228 /*
 229  * Useful ROM addresses
 230  */
 231 #define KA650ROM_SIDEX  0x20060004      /* system ID extension */
 232 #define KA650ROM_GETC   0x20060008      /* (jsb) get character from console */
 233 #define KA650ROM_PUTS   0x2006000c      /* (jsb) put string to console */
 234 #define KA650ROM_GETS   0x20060010      /* (jsb) read string with prompt */
 235 #define KA650_CONSTYPE  0x20140401      /* byte at which console type resides */
 236
 237 /*
 238  * Some useful macros
 239  */
 240 #define GETCPUTYPE(x)   ((x >> 24) & 0xff)
 241 #define GETSYSSUBT(x)   ((x >> 8) & 0xff)
 242 #define GETFRMREV(x)    ((x >> 16) & 0xff)
 243 #define GETCODREV(x)    (x & 0xff)
 244
 245 #endif /* _VAX_KA650_H_ */